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Mobile 3rd Generation Intel® Core™ Processor Family, Mobile Intel® Pentium® Processor Family, and Mobile Intel® Celeron® Processor Family Datasheet, Volume 1 of 2
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INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. A...
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Revision History Revision Number 001 Revision Date • Initial release • Added Mobile 3rd Generation Intel® Core™ i7-3520M, i5-3360M, i5-3320M, i7-3667U, i5-3427U processors • Updated Table 7-10, Processor Graphics (VAXG) Supply DC Voltage and Current Specifications • Updated Section 1.5, Package 003 • Removed DDR 1066 MHz support • Updated Table 2-5, DDR3L/DDR3L-RS System Memory Timing Support • Added support for DDR3L-RS • Minor edits throughout for clarity 004 • Added Mobile 3rd Generation Intel® Core™ i7-3940XM, i7-3840QM, i73740QM processors • Removed references to the VCC_DIE_SENSE...
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Introduction The Mobile 3rd Generation Intel® Core™ processor family, Mobile Intel® Pentium® processor family, and Mobile Intel® Celeron® processor family are the next generation of 64-bit, multi-core mobile processors built on 22-nanometer process technology. The processor is designed for a two-chip platform. The two-chip platform consists of a processor and a Platform Controller Hub (PCH) and enables higher performance, lower cost, easier validation, and improved x-y footprint. The processor includes Integrated Display Engine, Processor Graphics, and an Integrated Memory Controller. The...
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Mobile Processor Platform Intel® Processor PECI Embedded Display Port Intel® Flexible Display Interface Intel® Management Engine Intel® 6/7 Series Chipset Families LVDS Flat Panel WiFi / WiMax Gigabit Network Connection Note: 1. USB 3.0 is supported on the Intel® 7 Series Chipset family only.
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Processor Feature Details • • • • Four or two execution cores A 32-KB instruction and 32-KB data first-level cache (L1) for each core A 256-KB shared instruction / data second-level cache (L2) for each core Up to 8-MB shared instruction / data third-level cache (L3), shared among all cores Supported Technologies • Intel® Virtualization Technology (Intel® VT) for Directed I/O (Intel® VT-d) • Intel® Virtualization Technology (Intel® VT) for IA-32, Intel® 64 and Intel® Architecture (Intel® VT-x) Intel® Active Management Technology (Intel® AMT) 8.0 • Intel® Trusted Execution Technology (Intel®...
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• Processor on-die Reference Voltage (VREF) generation for both DDR3 Read (RDVREF) and Write (VREFDQ) • 1Gb, 2Gb, and 4Gb DDR3 DRAM device technologies are supported — Using 4Gb DRAM device technologies, the largest memory capacity possible is 32 GB, assuming Dual Channel Mode with four x8 dual ranked DIMM memory configuration • Up to 64 simultaneous open pages, 32 per channel (assuming 8 ranks of 8 bank devices) • Command launch modes of 1N/2N • On-Die Termination (ODT) • Asynchronous ODT • Intel® Fast Memory Access (Intel® FMA): — Just-in-Time Command Scheduling — Command Overlap —...
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• PCI Express* extended configuration space. The first 256 bytes of configuration space aliases directly to the PCI Compatibility configuration space. The remaining portion of the fixed 4-KB block of memory-mapped space above that (starting at 100h) is known as extended configuration space. • PCI Express* Enhanced Access Mechanism. Accessing the device configuration space in a flat memory mapped fashion. • Automatic discovery, negotiation, and training of link out of reset • Traditional AGP style traffic (asynchronous non-snooped, PCI-X Relaxed ordering) • Peer segment destination posted...
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• 64-bit downstream address format; however, the processor never generates an address above 64 GB (Bits 63:36 will always be zeros) • 64-bit upstream address format, but the processor responds to upstream read transactions to addresses above 64 GB (addresses where any of Bits 63:36 are nonzero) with an Unsupported Request response. Upstream write transactions to addresses above 64 GB will be dropped. • Supports the following traffic types to or from the PCH: — DMI -> DRAM — DMI -> processor core (Virtual Legacy Wires (VLWs), Resetwarn, or MSIs only) — Processor core -> DMI • APIC and MSI...
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Embedded DisplayPort* (eDP*) • Stand alone dedicated port (unlike two generations ago that shared pins with PCIe interface) Intel® Flexible Display Interface (Intel® FDI) • For SKUs with graphics, carries display traffic from the Processor Graphics in the processor to the legacy display connectors in the PCH • Based on DisplayPort standard • The two Intel FDI links are capable of being configured to support three independent channels, one for each display pipeline • There are two Intel FDI channels, each one consists of four unidirectional downstream differential transmitter pairs: —...
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Processor Graphics Controller (GT) • • • • Intel® Rapid Memory Power Management (Intel® RMPM) – CxSR Intel® Graphics Performance Modulation Technology (Intel® GPMT) Intel® Smart 2D Display Technology (Intel® S2DDT) Graphics Render C-State (RC6) • Intel Seamless Display Refresh Rate Switching with eDP port Thermal Management Support • Digital Thermal Sensor • Intel Adaptive Thermal Monitor • THERMTRIP# and PROCHOT# support • On-Demand Mode • Open and Closed Loop Throttling • Memory Thermal Throttling • External Thermal Sensor (TS-on-DIMM and TS-on-Board) • Render Thermal Throttling • Fan...
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