Catalog excerpts
Empowering Tomorrow's AI Computing MM4080B6-12G NVIDIA RTX 4080m MXM Graphics Card User Manual Shenzhen ZRT Technology Co., Ltd 深圳智锐通科技有限公
Open the catalog to page 1MM4080B6-12G User Manual 1.Specifications Model Graphics Processing Unit NVIDIA GeForce RTX4080 Max-Q Graphics Clock Memory Size Memory Clock Memory Bandwidth Display Features Number of Output Channel Board Power Board Dimensions MXM Graphics Module Version 3.1 Type B (105x82mm) Operation System Operating Temperature Storage Temperature Operating Humidity Storage Humidity Render Config Shader Processing Units Tensor Core
Open the catalog to page 3MM4080B6-12G User Manual Theoretical Peformance Pixel Rate Texture Rate Graphics Features DirectX Shader Model Video Playback *Total resolution based on every display resolution is 1920*1080@60Hz.
Open the catalog to page 4Power Management (PWR_EN, PWR_GOOD)
Open the catalog to page 5MM4080B6-12G User Manual 3.Connector Pinout Table 3.1 and Table 3.2 list the connector pinout. Table 3.1 Connector Pinout Pin Signal Name Signal Name Signal Name Signal Name
Open the catalog to page 6MM4080B6-12G User Manual Table 3.2 Connector Pinout(continued) Pin Signal Name Signal Name Signal Name Signal Name PEX_CLK_REQ # PEX_RST# VGA_DDC_DA T VGA_DDC_CL K
Open the catalog to page 7MM4080B6-12G User Manual 4.MXM Connector Figure 4.1 MXM Connector (Card Top) Figure 4.2 MXM Connector (Card Bottom) 5.Power Group Table 5.1 shows the MXM module power requirements. The voltage tolerances in the table are specified as measured on module edge finger. The system must be able to supply the full specified current on rails (except PWR_SRC) at all times. Th current capability of the PWR_SRC rail must be defined by the system in the MXM system information structure. Table 5.1 MXM Power Rails Signal Name Note: PWR_SRC voltage range is assumed to be DC or RMS. However under any...
Open the catalog to page 8MM4080B6-12G User Manual 6.Power Sequencing There is no power sequencing requirement for the input voltages to the MXM module. However the PWR_EN signal may be asserted only after all power rails are within specified tolerance. The state of PWR_GOOD is undefined until all rails are fully ramped. Refer to Figure 6.1 for details Figure 6.1 Power Sequencing 7.Module Power Down and Power Up The MXM module may be powered down using the PWR_EN signal. The system designer may choose to shut down or keep the input power while the module is powered down. Refer to Figure 7.1 for details. Figure 7.1...
Open the catalog to page 9MM4080B6-12G User Manual 8.Reset Requirements System reset may be deasserted only after the assertion of the PWR_GOOD signal. Figure 8.1 shows the reset requirements relative to the PWR_EN and PWR_GOOD signals. This sequence must be followed on initial power on, system reset and resume from suspend/hibernate. Figure 8.1 Reset Sequencing 9.DisplayPort Interface DC blocking capacitors of DisplayPort must be placed on the system board. In addition to the MXM implementation of Dual-mode DisplayPort requires the circuit in Figure 9.1 on the AUX lines for proper dongle detection. The HPD signal...
Open the catalog to page 10MM4080B6-12G User Manual 10.DVI/HDMI on DP Interface Native DVI or HDMI connector support can be implemented using a DisplayPort interface. Additional circuitry is required on the system and the proper signal mapping must be observed. As Figure 10.1 shows, 499Ω 1% pull-down resistors to ground on the DP lane signals must be placed on the con1ector side of AC coupling capacitors gated by a FET to limit the leakage. Additionally level shifting circuits must also be implemented on DDC Data and Clock. Table 10.1 shows the mapping to connect the signals from the MXM connector to the HDMI/DVI...
Open the catalog to page 11Cooling Suggestion: 1、显卡建议先固定在散热器上,散热器外径为 4mm,M2 的螺柱。 2、散热器的重量要用箱体来支撑固定。 3、显存和 MOS 要加导热垫。 Components Mosfet *显存和 MOS 由“探针”监测;GPU 由“Furmark
Open the catalog to page 12MM4080B6-12G User Manual 13.Performance Benchmark Single Precision FLOPS(CUDA-Z) Double Precision FLOPS(CUDA-Z) 14.Driver Windows 11:https://pan.baidu.com/s/1uFnoXduKJ77AlPj7kvFtQQ?pwd=rv3y Windows 10 64bit:https://pan.baidu.com/s/1uFnoXduKJ77AlPj7kvFtQQ?pwd=rv3y Linux 64bit: Linux x64 (AMD64/EM64T) Display Driver | 550.78 | Linux 64-bit | NVIDIA Uninstall Driver Video: https://www.douyin.com/user/MS4wLjABAAAAfV567McP9KjHrjFWngJgFG8h7XMSWsqH55hBIryutmg? modal_id=7321980490926
Open the catalog to page 13MM4080B6-12G User Manual 17.Cooling Option 1.ZRT.48-6350-00-A00(For 120W) Dimension Rated Speed Wires Connector Rated Speed Wires Connector 2、确认 PCIE 复位信号。 3、主板 BIOS 更改为 UEFI BIOS。 Windows 10: (需 1809 版本之后) 在主板 BIOS 下,将 CSM 中 CSM Support 设置由 Enabled 更改为 Disabled。 1、原系统显卡驱动删除干净。(请使用 Display Driver Uninstaller 删除,
Open the catalog to page 15排除 检查 PCIE LANE Numbering Reversal 设置。 主要关注下上电和 pcie,确认下 1、PCIE 的连接(是否 0-15 反、差分正负反、x16 是否拆分,bios 可修改,软硬件要 一致) ,耦合电容是否少以及容值;协议兼容性(降 gen1,或用 x1 试试,显卡都能支 持 x1) 2、信号质量,100MHz clk(示波器看下抖动,bios 是否有展频) ,pcie 的信号质量 (看实际距离不长,概率不大,可以 bios 调不同的去加重、预加重值试试,能测试眼 图最好) 3、上电主要是给显卡的 enable 信号,其他的不影响开机,时序(主板启动比显卡快, bios 可以对 reset 信号延时试试) 开机时按 DEL 键进 BIOS 设置中选择 Chipset→System Agent (SA) Configuration→PCI Express Configuration→PCI Exp GPU-Z 显存容量与 ress Root Port 中的
Open the catalog to page 16深圳智锐通科技有限公司 Shenzhen ZRT Technology Co., Ltd Shenzhen ZRT Technology Co., Ltd Email: info@zrt-tech.com Tel.: +86-400-838-6869 +86-153-3876-2616 Website: www.zrt-tech.com Address: Room 2105-2106, Building A, Fenghuang Zhigu, No. 50, Tiezai Road, Xixiang Street, Bao’an District, 518100, Shenzhen Version 2024. All specifications are subject to change without prior notice. This information is for reference only, and the company reserves t
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