VARISCITE LTD. VAR-SOM-MX93x V1.x Datasheet NXP i.MX 93TM - based System-on-Module
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1. Document Revision History Revision 1.0 Notes Initial - Preliminary

4. Overview General Information The VAR-SOM-MX93 offers a high-performance processing for a low-power System-on-Module. The product is based on the i.MX 93 family which represents NXP’s latest power-optimized processors for smart home, building control, contactless HMI, IoT edge, and Industrial applications. The i.MX 93 includes powerful dual Arm® Cortex®-A55 processors with speeds up to 1.7 GHz integrated with a NPU that accelerates machine learning inference. A general-purpose Arm® Cortex®-M33 running up to 250 MHz is for real-time and low-power processing. Robust control networks are...

Feature Summary • Cortex®-A55 MPCore platform o Two Cortex®-A55 processors operating up to 1.7 GHz o Media Processing Engine (MPE) with Arm® NEONTM technology supporting the Advanced Single Instruction Multiple Data architecture o Floating Point Unit (FPU) with support of the Arm® VFPv4-D16 architecture o Support of 64-bit Arm® v8.2-A architecture o 256 KB cluster L3 cache o Parity/ECC protection on L1 cache, L2 cache, and TLB RAMs Cortex®-M33 core platform o Cortex®-M33 CPU operating up to 250 MHz o Support FPU o Support MPU o Support NVIC o Support FPB o Support DWT and ITM o Two-way...

LCDIF Display Controller o The LCDIF can drive any of:  MIPI DSI: up to 1920x1200p60  LVDS Tx: up to 1366x768p60 or 1280x800p60 MIPI CSI-2 Interface o One 2-lane MIPI CSI-2 camera input: o Complaint with MIPI CSI-2 specification v1.2 and MIPI D-PHY specification v1.2 o Support up to 2 Rx data lanes (plus 1 Rx clock lane) o Support 80 Mbps – 1.5 Gbps per lane data rate in high-speed operation o Support 10 Mbps data rate in low power operation MIPI DSI Interface o One 4-lane MIPI DSI display with data supplied by the LCDIF  Compliant with MIPI DSI specification v1.2 and MIPI D-PHY...

Block Diagram Figure 1 : VAR-SOM-MX93 Block Diagram SWAP ASSEMBLY OPTION MIPI CSI2 x1 (Dual Line) Serial Camera MIPI DSI/LVDS WiFi + BT Single or Dual Band (Assembly option) Digital Audio Pin2pin with additional VAR-SOM products. Please check pin-list document for details

5. Main Hardware Components This section summarizes the main hardware building blocks of the VAR-SOM-MX93. NXP i.MX 93 Overview i.MX 93 applications processors deliver efficient machine learning (ML) acceleration and advanced security with integrated EdgeLock® secure enclave to support energy-efficient edge computing. The i.MX 93 applications processors are the first in the i.MX portfolio to integrate the scalable Arm Cortex®A55 core, bringing performance and energy efficiency to Linux®-based edge applications and the Arm Ethos®-U65 microNPU, enabling developers to create more capable,...

Figure 2 : i.MX93 Block Diagram

One cluster of 2x Cortex-A55 cores Each core includes 32kB L1-I, 32kB L1-D and 64kB L2 cache per core 256kB shared cluster L3 cache Core cache protection (parity/ECC) supported Microcontroller available both for boot and for customer application Arm Cortex®-M33 Processor: o 16KB L1 Instruction Cache o 16KB L1 Data Cache o 256 KByte TCM, also accessible as SRAM by the rest of the system ECC support for both cache and TCM Boot ROM (256KB) 256KB Tightly Coupled RAM (TCM) for CM33, with ECC 640KB of SoC-specific OCRAM External Memory • One 16-bit DRAM controller: o Maximum supported capacity is...

Machine Learning • High-efficiency Neural-network Processing Unit (NPU) SPDIF supports raw capture mode that can save all the incoming bits into audio buffer. Up to 3x Synchronous Audio Interface (SAI) modules supporting I2S, AC97, TDM, and Codec/DSP interfaces Digital microphone input, up to 8-channel PDM Note: The above list refers to the chip capabilities, part of the pins is used on the SOM therefore the exact number of interfaces can be lower. 2x USB 2.0 OTG controller with integrated PHY interfaces 3x Ultra Secure Digital Host Controller (uSDHC) interfaces o uSDHC1 with boot support...

2x Low Power Periodical Interrupt Timer (LPIT) o 4 channels o 4 external trigger sources o Generic 32-bit resolution timer o Periodical interrupt generation 6x Timer/PWM module (TPM) o Prescaler divide-by 1, 2, 4, 8, 16, 32, 64, or 128 o 16-bit counter, support free-running counter or modulo counter mode, counting-up or down Includes 6 channels that can be configured for input capture, output compare, edgealigned PWM mode, or center aligned PWM mode 2x Low-Power Timer (LPTMR) 5x WatchDog modules (WDOG) Note: The above list refers to the chip capabilities, part of the pins is used on the SOM...

Memory RAM The VAR-SOM-MX93 is available with up to 2GB of LPDDR4 or LPDDR4X memory. Non-volatile Storage Memory The VAR-SOM-MX93 is available with a non-volatile MLC eMMC storage memory with optional densities of up to 64GB. It is used for Flash Disk purposes, O.S. run-time-image, Boot-loader, and application/user data storage. Audio (WM8904) The WM8904 is a high performance ultra-low power stereo CODEC optimized for portable audio applications. The device features stereo ground-referenced headphone amplifiers using the Wolfson ‘Class-W’ amplifier techniques. It incorporates an innovative...

Wi-Fi + BT VAR-SOM-MX93 module can be configured either for Dual band or Single Band Wi-Fi® and Bluetooth® add on modules. Both realize the necessary PHY/MAC layers to support WLAN applications in conjunction with a host processor over a SDIO interface. The modules also provide a Bluetooth/BLE platform through the HCI transport layer. Both WLAN and Bluetooth share the same antenna port. VAR-SOM-MX93 Wi-Fi and BT Key Features: • • • • • • • IEEE 802.11 ac/a/b/g/n (Dual Band Option) IEEE 802.11 b/g/n (Single Band Option) Bluetooth 2.1+EDR, and BLE 5.2 U.F.L connector for external antenna...