
The Synchronous-Serial Interface (SSI) offers advantages such as reduced cabling, requiring only 4 lines for 24-bit encoders compared to 24 lines for parallel interfaces. It provides noise immunity and allows for automatic plausibility checks through multiple data word transmissions. The use of opto-couplers helps eliminate earthing loops.
SSI converts parallel information into serial form using a parallel-serial converter, transmitting it synchronously with a clock signal. The clock sequence determines the data word length, requiring n + 1 cycles for a data word with n bits. Transmission speed is dictated by the clock frequency.
SSI significantly reduces wiring needs, requiring only one twisted pair line for data and one for the clock, compared to 24 wires for parallel output. A minimum of 6 wires is needed for clock, data, and supply voltage.
The SSI protocol initiates data transmission by changing the clock signal from Log 1 to Log 0. Data is stored in Gray code and transferred bit by bit with each clock edge. The monoflop time sets the interval between transmissions and the minimum clock frequency.
An encoder with 1024 positions/revolution and 256 revolutions uses a 25-bit data word. Transmission starts with multiturn bits, followed by single-turn bits, ending with unused bits set to Log 0.
In single transmission, the clock sequence ends after the least significant bit (LSB) is transmitted, as only zeroes follow.
In multiple transmission, the clock sequence continues beyond the LSB, allowing repeated transmission of the same data word.
The control electronics generate the clock sequence for data transmission and can convert serial data back to parallel form, including Gray to binary code conversion.
Encoder and control electronics use differential line drivers and opto-coupler inputs, ensuring noise reliability and eliminating earth loops.
The monoflop time must exceed the clock cycle time to keep the parallel/serial converter active. The standard monoflop time is 15-25 µs, determining the minimum clock frequency and maximum wait time.
The maximum data transmission rate is influenced by drivers, reception electronics, and the RS 422 standard, with the clock frequency being half the Baud rate.
The SSI transmission link includes encoder, cable, and reception electronics, each contributing to signal delay.
Total delay time (TD) includes encoder electronics, cable delay, and reception logic. The formula for TD accounts for these delays, with specific values provided for TWK components.
Data must be read during the clock cycle time for correct processing. The reading-in clock sequence should be delayed relative to the data-transmission clock sequence to maintain synchronism.
Synchronous-Serial Interface for absolute Encoders TWK-ELEKTRONIK GmbH · D-40041 Düsseldorf · PB 105063 · Heinrichstr. 85 · Tel +49/211/632067 · Fax +49/211/637705 · e-mail: info@tw
Open the catalog to page 1Advantage of the SSI over parallel interfaces Significantly less expenditure for cabling: In the case of 24 bit encoders, only 4 lines are needed for the transmission of data instead of 24. Expenditure for cabling and interface components does not depend on the length of the data word. Screening out of noise is achieved through the clock and data signals being transmitted synchronously and symmetrically via twisted pair lines. Multiple transmission of each data word provides an automatic plausibility check. Absolute Encoder and reception electronics are separated with opto-couplers rendering...
Open the catalog to page 3Example: Absolute Encoder with 4096 positions / 360°, 4096 revolutions and Gray tree as output code Idle state
Open the catalog to page 4Single transmission In the case of a single transmission, i.e. when the current position data is read out once, the clock sequence can be terminated after the transmission of the LSB since only zeroes will follow this. Wait time Clock sequence Idle state Idle state (Parallel / serial converter) P/S Data + Data word Least significant bit (S1) Bit (S 1) Multiple transmission In the case of multiple transmission, i.e. when the current position data is read out a number of times, the clock sequence is designed in accordance with the schematic below. Clock sequence 1st transmission Intermediate clock...
Open the catalog to page 5TTL / HCMOS Logik / Logic 91R 100R Takt IN-/ Clock IN6N137 (Optokoppler/Optocoupler ) LED z.B. LR3360 (rot) Siemens oder ähnliche LED e.g. LR3360 (red) Siemens or similar Output circuit 47nF 100pF Data OUT+/ Data OUT+ Data OUT-/ Data OUT- TTL / HCMOS Logik / Logic The output circuit is in the form of a differential line driver which fulfils complaying with RS 422 / RS 485. The differential, symmetrical design ensures a high degree of reliability in respect of noise. The use of opto-coupler inputs means that earth loops are not required and this in turn reduces the sensitivity to noise still further....
Open the catalog to page 6Maximum data transmission rate [MHz] maximum Baud rate in acc. with RS 422 The maximum achievable data transmission rate (clock frequency) is set for the drivers and reception electronics used as well as for the transmission protocol in accordance with the RS 422 standard. It must be one half of the values stated in the standard for the Baud rate. Both limit curves are shown in the adjoining graph. It is shown below how the maximum data transmission rate can be achieved by means of measures on the reception electronics side by taking into account the different transit times. maximum clock frequency...
Open the catalog to page 7Accordingly the above values can be inserted into the formula tTD (ns) = 300 ns + 2 x 6.5 ns/m x lCA (m) Example: For a cable of length 200 m the total delay is tTD = 300 ns + 2 x 6.5 ns/m x 200 m = 2900 ns = 2.9 µs In the schematic below the significance of the total delay time t for transmission is represented for the above example. The clock TD frequency selected is 300 kHz, namely the maximum permitted for a cable length of 200 m. This clock frequency is equivalent to a clock cycle time (tT) of 3.3 µs. 11.4 Significance of the time by which the evaluation (reading-in) of the data as transmitted...
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