TC7739FTG
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TOSHIBA CMOS Integrated Circuit Silicon Monolithic System power IC 1. Overview TC7739FTG is a system power IC which incorporates 2 channels of step-down DCDC converter, 4 channels of LDO, and 1 channel of load switch. Each output voltage can be set various output settings through the I2C bus. 2. Features • AVCC input voltage range: 4.5V to 5.5V • DCDC converter (CH1 and CH2) ■ Output voltage accuracy: ±1%@Ta=25°C ±2%@Ta=-40°C to 85°C ■ Built in Discharge circuit ■ Built in Soft Start function ■ Load regulation 0.5% ■ Line regulation 0.5% ■ Built in Over Voltage Protection (OVP) ■ Built in Under Voltage Protection (UVP) ■ Built in Over Current Limitation (OCL) • Load switch (CH7) ■ Rds(on): 62mQ(Typ.) ■ Built in Discharge circuit ■ Built in Soft Start function ■ Built in Under Voltage Protection (UVP) ■ Built in Over Current Limitation (OCL) • Reset voltage output function Detection voltage: 3.6V±90mV Output delay time after detecting voltage: 10^s(Typ.) Output delay time after recovering voltage: 60^s(Typ.) • Output parameters can be changed by I2C control. • Other system protection: Thermal Shutdown (TSD), Under Voltage Lock Out (UVLO) • Package: P-VQFN32-0505-0.50-001 • Application: Tablet PC, portable devices * 1: Modifiable through I2C.

TC7739FTG 3. Block diagram and application circuit Reference SHUTDOWN Reference Voltage LOGIC Controller Logic Controll Figure 3.1 Block diagram and application circuit Note • Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass-production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits...

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Notes: I= Input, O=Output, P=Power

TC7739FTG 6. State diagram ANY STATE CH1 = ON/OFF CH2 = ON/OFF CH3 = OFF CH4 = OFF CH5 = ON/OFF CH6 = ON/OFF CH7 = OFF I2C = YES Inhibited operation ERROR STOP TSD CH1 = ON/OFF CH2 = ON/OFF CH3 = ON/OFF CH4 = ON/OFF CH5 = ON/OFF CH6 = ON/OFF CH7 = ON/OFF I2C = YES State diagram Mode description POWER OFF : It is the mode in which the main power supply (AVCC) is not supplied. If the AVCC reaches below POR detection voltage (2.5V target), it will shift to this mode. It is the mode in which the AVCC is supplied and the POR is de-asserted. Operating circuits are POR, RESET, UVLO, and I2C...

TC7739FTG 7. Power supply sequence 7.1. Sequence EN1 signal can control CH1, CH2, CH5, and CH6 outputs. EN2 signal can control CH3, CH4, and CH7 outputs. 7.1.1. Startup sequence by EN1 signal Each channel starts the startup sequence after the Fix_Delay (1.2 ms) when receiving EN1=“H.” Numerical value in () shows default values. Startup sequence by EN1 signal 7.1.2. Turn off sequence by EN1 signal (1) Normal sequence CH1, CH2, CH5, and CH6 immediately start the turn off sequence when receiving EN1=“L.” Turn off sequence by EN1 signal

TC7739FTG (2) Turn off sequence at the AVCC voltage drop. In the state of EN1="H," when the AVCC voltage is dropping below the UVLO detection voltage, CH1, CH2, CH5 and CH6 start the turn off operation. In addition, since the RESET pin voltage is set "L" in the state of which the AVCC voltage is dropping below the RESET detection voltage, the normal sequence starts when EN signal is "L." However, when the AVCC voltage is dropping below the UVLO detection voltage in the same state, the turn off sequence starts without waiting for the Delay time. CH1 CH2 CH5 CH6 Discharge is started when EN1...

TC7739FTG 7.1.4. Turn off sequence by EN2 signal (1) Normal sequence Each channel immediately starts the turn off sequence when receiving EN2=”L.” CH3_ENDLY (10ms) Numerical value in () shows default values. Turn off sequence by EN2 signal (2) Turn off sequence by AVCC voltage drop In the state of EN2="H," when the AVCC voltage is dropping below the UVLO detection voltage, CH3, Ch4, and CH7 start the turn off operation. In addition, since the RESET pin voltage is set "L" in the state of which the AVCC voltage is dropping below the RESET detection voltage, the normal sequence starts when EN2...

TC7739FTG 7.1.5. Enable control by register setting In the case of startup by EN1 signal, the enable control by the register setting does not operate during Fix_Delay, and ENDLY period. Since the normal startup sequence is given priority, the enable control is ON after completion of the Fix_Delay, and ENDLY period. When the enable control is ON by register setting after completion of the startup by EN signal, perform immediately the startup (soft start operation) without performing ENDLY. Example: Register control for CH1 EN1 signal input is in the Delay setting time and the Delay operation...

TC7739FTG 8. Functions 8.1. DCDC (CH1 and CH2) This is DCDC Buck converter. The oscillation frequency is 2MHz (CH1) and 1.5MHz (CH2).The PWM or PFM operation can be switched according to the load state, and kept high efficiency even in the light load state. Electrical power efficiency characteristics of CH1 and CH2 (Reference value) Load transient characteristics of CH1(Reference value) CH2 Current (1A/DIV) Load transient characteristics of CH2(Reference value)

Figure 8.6 Line transient characteristics of CH2 vs VIN2 (Reference value)

Time(^s) Timers) Figure 8.7 Line transient characteristics of CH2 vs AVCC (Reference value) As the protection functions, this convertor builds in OVP (Over Voltage Protection), UVP (Under Voltage Protection), and OCL (Output Current Limitation). According to the register setting (0x01 [bit4 and bit0]), oVp and UVP can select the latch or Hiccup operation. The default operation is the latch operation. OVP stops switching if the voltage reaches over the control voltage. When the latch operation is selected by the register setting, the switching is stopped and held after passing regulation...