TELEDYNE LECROY PeRT3 Phoenix - Protocol Enabled Receiver and Transmitter Tolerance Tester Klt(UK*6KktQ PCkC^lOl Pattern / T«cmin*tiof> T iMliimw T ^‘Umisa a,^,^ ;T |Kry

In many new generations of high speed serial I/O standards, the protocol layer optimizes physical layer properties, such as optimizing equalization settings for accurate signal transmission to the receiver through long and noisy transmission mediums. This requires a PeRT3 - a new class of instrumentation that can perform standard receiver tests and also communicate to the transmitter in protocol language. The PeRT3 therefore ensures proper operation of integrated transmitter and receiver systems, optimizes test time, and minimizes equipment and setup complexity. Key Features • Bit Error Rate...

What are the Components of a PeRT3? PeRT3 is fundamentally a BERT system which consists of a pattern generator and an error detector. The pattern generator has the ability to generate NRZ and out of band signals combined with a wide range of vertical and horizontal noise/jitter. At the same time, the PeRT3’s unique architecture utilizes FGPA and signal integrity hardware to communicate with the device under test in the protocol layer. This allows the PeRT3 to perform handshake protocols for loopback initialization, link equalization training and SKP or Align symbol filters for various serial...

DATA TX CLOCK OUT CLOCK IN JITTER; l» 1. Generator and Error Detector PeRT3 generator and receiver provides an extensive list of jitter sources, built-in de-emphasis and pre-shoot for BER testing, and a protocol aware pattern generator and error detector for protocol handshake and link training 2. Clock Output Full-rate and sub-rate clock can be output for synchronized testing 3. Trigger Output Trigger output provides programmable trigger states based on BER and the link training state machine 4. Software Control Interface Controlling software can be installed on any PC through a USB interface...

i lii li d ud r* LeCroy PeRT3™: Protocol Enabled Receiver Tolerance Tester - [PCIe G3 Loopback EQ] Pattern Options Random Jitter \/ © © Off Off ps MHz High Freq SJ 2 Q © © Off Off ps KHz Low Freq SJ Q © © Off Off mV MHz Common Mode O Pattern / Termination PCIe G3 Loopback EQ PCIe G2 LO 1 State Machines PCIe G1 Loopback PCIe G2 LO PCIe G2 Loopback PCIe G3 Loopback PCIe G3 Loopback EQ SAS Connect SAS Connect 1 SATA COMRESET Fixed SATA COMRESET Repeat SATA COMRESET Test SATA Connect SATA Connect Device SATA Connect Host Test Results Test Patterns i. 3. Preset .Eval V. 3. Success I CAP| NUM| SCRL|...

Loopback and Link Training Conditions Each connect sequence provides the user with a list of options to customize the test criteria and debugging conditions. Signal and Jitter Sources All Signal source and jitter parameters can be swept during BER testing. For example, by sweeping the Deemphasis and Pre-shoot values, the user can identify the optimized equalization window. State View and Editor Graphical interpretation for the handshake state machine provides fast visual status of handshake status. Complete Characterization in Development or Automated Test Environments High-speed serial subsystem...

Test Log A full log of the stresses applied to the device under test and the resulting error rates, are all logged against time. Graphical Test Script Editor The simple, intuitive interface for creating automated test scripts can, with a few clicks, set up automated tests that initialize the DUT and record error rates while sweeping through any user defined range of jitter parameters. Scatter Chart Pass/Fail information is plotted against the stress parameters under test. See what happened for every test case-in real-time. PeRT3 programmable Setup trigger State Machine sets up condition...

PCI EXPRESS 3.0 TESTING Transmitter Test Receiver Test Link Equalizati New Tools for New Test Requirements Requirements for serial data testing unique to PCI Express® 3.0 place new demands on the traditional physical layer test tools. Not only does the specification mandate that the receiver tester be protocol aware, but certain other characteristics of PCI Express 3.0, such as dynamic equalization, essentially require combined physical/protocol layer test capabilities for validation and debug. Only Teledyne LeCroy has the comprehensive set of physical layer, protocol layer, and network analysis...

Complete Characterization in Development The biggest challenge for receiver compliance testing for PCI Express 3.0 is how the receiver performs dynamic equalization training of both the receiver equalization parameters and the proper selection of transmitter equalization presets. The PeRT3 Phoenix can generate both 8b/10b and 128b/130b encoded data to establish PCI Express 3.0 connectivity, and can perform transmitter equalization preset negotiation while the receiver optimizes the receiver equalization parameters. The PeRT3 Phoenix has the unique ability to adjust de-emphasis and preshoot parameters...

PeRT3 Value in USB 3.0 Receiver Testing PeRT3 was the first protocol aware BER test system which enabled SKP or Align filtering during asynchronous receiver test setups. Serial data standards such as USB3.0 and SATA utilize SKP and Align symbols to align recovered and system clocks. This presents a new challenge for BER receiver testers as transmitted and recovered data are different due to SKP or Align Symbols. Combined with an extensive jitter profile and built-in de-emphasis capabilities, the PeRT3 is the most complete and widely adapted solution for USB3.0 Electrical compliance testing. PeRT3...

First Protocol Aware Receiver Test Solution for SuperSpeed Plus 10Gbps PeRT3 Phoenix System is the first protocol aware receiver test solution for Superspeed USB 10Gbps (USB 3.1). At 10Gbps, USB3.1 uses a more efficient data encoding scheme and delivers more than twice the effective data rate of USB 3.0, presenting new challenges in receiver testing. The new Teledyne LeCroy PeRT3 Phoenix System simplifies these challenges. PeRT3 Phoenix System supports all the jitter and equalization generation required at 10Gbps, as well as the protocol level handshake that is critical to put the device under...