PeRT3™Test System Protocol-enabled Receiver and Transmitter Tolerance Tester

2 PeRT3: A NEW CLASS OF INSTRUMENT The PeRT3 (Protocol-enabled Receiver and Transmitter Tolerance Tester) fills the space between physical layer test and protocol test, providing a new and more intelligent capability for performance testing of receivers and transmitters. Designed to meet the test needs of engineers working with serial data transceivers and other high-speed serial data communication systems, the LeCroy PeRT3 Test System is not just a new instrument, it is an entirely new instrument class.

3 Key Features • BER Generator & Detector – Up to 6 Gb/s high-speed pattern generator and error detector • Multichannel Operations – Multichannel support up to 8 channels per system with independent jitter profile and analysis for each channel • Protocol Support – Handshake, loop-back and FER support for PCI Express®, SATA, SAS and USB 3.0 • Jitter Tolerance Testing – Characterize and qualify high-speed serial transceivers • Integrated Pattern Generator – Generates protocol level traffic using 1 GB user memory per channel with frames and data scrambling • Protocol Level Error Detection – Recognizes...

Developed through the synergy of LeCroy’s electrical test and protocol test technologies, the PeRT3 test system combines the functions and features of a signal generator, bit error rate tester (BERT), protocol editor and data analysis system in one instrument. This combination provides the ability to fully automate testing of transceivers and electronic systems in a comprehensive manner that not only measures adherence to specifications, but also examines the entire performance envelope of the system under test. 4 Complete Characterization in Development or Automated Test Environments High-speed...

5 design that has significant margin to allow for real-world variations in conditions and signal quality. Map the Full Performance Envelope Along Multiple Dimensions Varying the type and amount of modulation introduced while counting the errors on the returning signal, the PeRT3 maps out the full performance envelope of the device under test along multiple dimensions. This provides not just a GO/NO-GO test, but quantifies the error margins and error susceptibilities of each new design or each tested device. Should failure occur during the test, the environment that caused the failure can be generated...

6 PERT3: PROTOCOL ENABLED Scatter Chart Pass/Fail information plotted against the stress parameters under test. See what happened for every test case—in real-time. The PeRT3 is protocol-enabled to provide new capabilities in control of devices under test, adding the ability to use live traffic for testing, to manage protocol level issues that defeat simple loopback testers, and to detect and measure errors at the protocol level as well as the bit level. Protocol Enabled for Complete System Control, Real Data Traffic Generation, and Protocol Level Error Testing Protocol enabling is a key advantage...

7 SPECIFICATIONS AND ORDERING INFORMATION Specifications Ordering Information Product Description Product Code PeRT3 Hardware Platforms Eagle PeRT3 System – 1 Channel PER-R006-S01-X Eagle PeRT3 System – 2 Channel PER-R006-S02-X Eagle PeRT3 System – 4 Channel PER-R006-S04-X Product Description Product Code Eagle Test Suite Options Eagle Jitter Tolerance Test Suite PER-R006-008-A Eagle SAS Receiver Test Suite SAS-R006-004-A Eagle SATA Receiver Test Suite SAT-R006-004-A Eagle PCI Express Receiver Test Suite PCI-R006-008-A Eagle USB 3.0 Receiver Test Suite USB-R006-001-A Generator Data Out Bit Rate...

Local sales offices are located throughout the world. Visit our website to find the most convenient location. © 2010 by LeCroy Corporation. All rights reserved. Specifications, prices, availability, and delivery subject to change without notice. Product or brand names are trademarks or requested trademarks of their respective holders. PCI Express is a registered trademark of PCI-SIG.® 1-800-5-LeCroy www.lecroy.com PeRT3DS-04Jan10 PDF