Clock Recovery Instrument BERTScope® CR Series Data Sheet Features & Benefits ■ Instrumentation Quality Clock Recovery ■ 150 Mb/s to 28.6 Gb/s with Continuous Data Rate Coverage to include Next-generation l/Os including PCIe 3.0,10GBASE-KR, 16xFC, 25/28 G ■ Accurate, Variable Loop Bandwidth from 100 kHz to 12 MHz, with Optional 24 MHz for the Jitter Transfer Function (JTF) Bandwidths of ■ Accurate, Adjustable, Self-measured, and Displayed PLL Loop Bandwidth, Peaking, and JTF - Get the "Golden PLL" Response Needed for Standards Compliance Testing ■ Programmable Peaking Adjustment with First- and Second-order Rolloff ■ USB Control Interface Integrated into BERTScope View, or Stand-alone with included BERTScope PC Software ■ DC-coupled Data Through Path for Accurate Signal Integrity ■ Full and Divided Clock Outputs with Selectable Divide Ratios. Full-rate Clock Output up to 14.3 Gb/s, Half-rate Clock Output from 14.3 Gb/s to ■ Built-in Equalizer Function enables Clock Recovery under High ISI Input ■ Data Measurement Capability - Edge Density Measurement - Determine the mark density of the signal under test - Spread Spectrum Clock Waveform View including dF/dt ■ Ideal for Spread Spectrum Clock (SSC) Applications with Large Frequency Excursions ■ Optional Direct Spectral Analysis of Jitter Components when under USB Control from BERTScope or on PC using Provided "stand-alone" SW. ■ Optional "Spectrum Analyzer" Display with Cursor Measurements of Jitter Amplitude and Frequency ■ User-settable Frequency-gated Measurements for Band-limited Integrated Jitter Optionally Available - Preset Band Limits for PCI Express Gen2 Jitter Spectrum ■ Optional PCIe 2.5 and 5 Gb/s PLL Loop Analysis (Also requires jitter analysis option) ■ CR175A and CR286A offer Optional Higher-sensitivity Data Inputs with Clock Recovery on Signals as Small as 40 mV Amplitude (Single ended), 20 mV Amplitude (Differential) - No DC-coupled Data Through Path with this Option ■ DesignA/erification of High-speed I/O Components and Systems ■ Signal Integrity Analysis ■ Certification Testing of Serial Data Streams for Industry Standards

Data Sheet recovery Instrument recovery Instrument recovery instrument The BERTScope CR Series can be used with any sampling oscilloscope, BERT, or pattern Compliant Clock Recovery Many communication standards now specify that jitter testing must be carried out using a reference clock that has been derived from the data signal. Typical Phase Lock Loop (PLL) characteristics are specified in terms of the -3 dB bandwidth of the recovery loop, the rate of rolloff of the frequency response, and the degree of response peaking allowable. The BERTScope CR Series advanced architecture measures and displays...

Clock Recovery Instrument — BERTScope® CR Series Low-speed Real Time Clock Recovery Recover Spread Spectrum Clocks for Testing to Electrical Serial Bus Standards Spread Spectrum Clocking (SSC) is an increasingly required feature of serial bus standards. When employed, it can prove difficult to track but its effect must be included in test. These instruments are able to track SSC correctly with large frequency excursions up to 5000 ppm, making them unique amongst clock recovery test solutions. The BERTScope CR Series is the first clock recovery instrument to recover clocks from spread spectrum...

Data Sheet A revealing dF/dT waveform showing poor performance. The SSC Waveform view provides a calibrated plot of the SSC modulation, allowing the user to instantly see if any of these modulation problems exist. The vertical axis represents the carrier deviation, and can be scaled in units of either frequency deviation (PPM) or time (ps). To avoid the tracking and possible EMI problems from incorrect deviation rates, some of the new serial data standards are specifying the minimum and maximum rate of change of the SSC carrier frequency. The BERTScope CR Series can directly display the dF/dt...

Clock Recovery Instrument — BERTScope® CR Series Calibrated Loop Bandwidth Data Rate (Gbis) Clock Recovery Loop Bandwidth versus Data Rate - The BERTScope CR Series has a variable loop bandwidth from 100 kHz to 12 MHz. The loop bandwidth is calibrated when operating within the range shown in green in the plot to the left. Importance of Data and Recovered Clock Path Delay Matching When recovering a clock with SSC modulation or containing a large amount of periodic jitter, it is important to precisely match the delay path of the data signal and recovered clock between the BERTScope CR Series and...

Data Sheet Frequency-gated measurement. Frequency-gated Measurement Because the clock recovery process tracks the lower-frequency components in a serial data receiver, the system is generally less sensitive to low-frequency jitter components than to the higher-frequency ones. This varying sensitivity to different frequency components is factored into the compliance tests of various serial data standards, such as second-generation PCI Express. Thus, the ability to measure the magnitude of the jitter components emitted from a transmitter in various frequency bands is important for system validation....

Clock Recovery Instrument — Compliant Clock Recovery for 100 Gb The BERTScope CR286A is designed to support emerging high-speed standards such as 100 Gb Ethernet (100 GbE), which operates at a line rate of 25.78125 Gb/s. The CR286A goes a step further with a maximum data rate of 28.6 Gb/s to support OIF-CEI 28G. These instruments have all the core features of the CR125A, the award-winning BERTScope clock recovery product, with extended locking range to 26 and 28.6 Gb/s. BERTScope CR Series High-sensitivity Model The CR175A and CR286A with Option HS include the same features as the CR models,...

Data Sheet Instrument Specifications Characteristic Description Data Interfaces 50 Q differential or single-ended, DC coupled. APC 3.5 _user-replaceable Planar Crown8 adapter_ Data Rate Coverage 150 Mb/s to 28.6 Gb/s (12.5 Gb/s for CR125A, 17.5 Gb/s Data Insertion Loss 2 dB (min), 2.6 dB (typical), 3 dB (max) from data input to _data output_ Data Input Voltage -5 V (min), +5 V (max) Input Sensitivity 100 mV single ended (typical) Measured Edge Density ±1% Measured Phase Displayed as % RMS and % peak-peak, 10-90% Deviation_peak-peak available range_ Clock Outputs_ Clock Interfaces 50 Q single-ended,...