TSX712 Low-power, precision, rail-to-rail, 2.7 MHz, 16 V operational amplifier Datasheet - production data Battery-powered instrumentation Instrumentation amplifier Active filtering DAC buffer High-impedance sensor interface Current sensing (high and low side) Description Features • • • • • • • • • • Low input offset voltage: 200 µV max. Rail-to-rail input and output Low current consumption: 800 µA max. Gain bandwidth product: 2.7 MHz Low supply voltage: 2.7 - 16 V Unity gain stable Low input bias current: 50 pA max. High ESD tolerance: 4 kV HBM Extended temp. range: -40 °C to +125 °C Automotive qualification Related products • • • • • See the TSX711 for single op amp See the TSX7192 for higher speeds with similar precision See the TSX562 for low-power features See the TSX632 for micro-power features See the TSX922 for higher speeds The TSX712 dual, operational amplifier (op amp) offers high precision functioning with low input offset voltage down to a maximum of 200 µV at 25 °C. In addition, its rail-to-rail input and output functionality allows this product to be used on full range input and output without limitation. This is particularly useful for a low-voltage supply such as 2.7 V that the TSX712 is able to operate with. Thus, the TSX712 has the great advantage of offering a large span of supply voltages, ranging from 2.7 V to 16 V. It can be used in multiple applications with a unique reference. Low input bias current performance makes the TSX712 perfect when used for signal conditioning in sensor interface applications. In addition, low-side and high-side current measurements can be easily made thanks to railto-rail functionality. High ESD tolerance (4 kV HBM) and a wide temperature range are also good arguments to use the TSX712 in the automotive market segment. This is information on a product in full production.

Package pin connections Figure 1: Pin connections (top view)

Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1: Absolute maximum ratings (AMR) Symbol VCC Input voltage Input current Storage temperature Thermal resistance junction to ambient (MiniSO8) Thermal resistance junction to ambient (SO8) Maximum junction temperature HBM: human body model ESD Differential input voltage Supply voltage CDM: charged device model Latch-up immunity All voltage values, except the differential voltage are with respect to the network ground terminal. Differential voltages are the non-inverting input terminal with...

Electrical characteristics Electrical characteristics Table 3: Electrical characteristics at VCC+ = +4 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and RL > 10 kΩ connected to VCC/2 (unless otherwise specified) Input offset voltage Input offset voltage drift Input bias current Input offset current Input capacitance Tmin < Top < Tmax Vicm = -0.1 to 2 V, Vout = VCC/2 High level output voltage (voltage drop from VCC+) Supply current per amplifier Tmin < Top < Tmax Isink RL= 2 kΩ tο VCC/2 Low level output voltage Large signal voltage gain Common mode rejection ratio 20 log (ΔVic/ΔVio) Vicm = -0.1...

Electrical characteristics Symbol Gain bandwidth product Phase margin Gain margin Positive slew rate Negative slew rate Equivalent input noise voltage Total harmonic distortion + noise Maximum values are guaranteed by design. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration (see Section 4.6). Table 4: Electrical characteristics at VCC+ = +10 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL > 10 kΩ connected to VCC/2...

Electrical characteristics Parameter Large signal voltage gain Conditions Tmin < Top < Tmax High level output voltage (voltage drop from VCC+) Low level output voltage Supply current per amplifier Gain margin Positive slew rate Phase margin Negative slew rate Gain bandwidth product Tmin < Top < Tmax Isink Equivalent input noise voltage Total harmonic distortion + noise Maximum values are guaranteed by design. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier...

Electrical characteristics Table 5: Electrical characteristics at VCC+ = +16 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL > 10 kΩ connected to VCC/2 (unless otherwise specified) Symbol Input offset voltage Input offset voltage drift Input bias current Input offset current Input capacitance Supply voltage rejection ratio 20 log (ΔVcc/ΔVio) Large signal voltage gain Tmin < Top < Tmax Vicm = -0.1 to 14 V, Vout = VCC/2 High level output voltage (voltage drop from VCC+) Supply current per amplifier Tmin < Top < Tmax Isink RL= 2 kΩ Low level output voltage Common mode rejection ratio 20 log...

Electrical characteristics Parameter Gain bandwidth product Phase margin Gain margin Negative slew rate Positive slew rate Av = 1, Vout = 10 VPP, 10 % to 90 % Tmin < Top < Tmax Equivalent input noise voltage Total harmonic distortion + Noise Maximum values are guaranteed by design. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration (see Section 4.6).

Electrical characteristics Figure 2: Supply current vs. supply voltage Figure 3: Input offset voltage distribution at VCC = 16 V 20 Input offset voltage (µV) Input offset voltage (µV) Figure 6: Input offset voltage drift population Figure 7: Input offset voltage vs. supply voltage at VICM = 0 V Input Offset Voltage (µV) Figure 5: Input offset voltage vs. temperature at VCC = 16 V Input offset voltage (µV) Figure 4: Input offset voltage distribution at VCC = 4 V ∆Vio/∆T (µV/ºC)