RPC56AP60x, RPC56AP54x RPC560P60x, RPC560P54x 32-bit Power Architecture® based MCU with 1088 KB Flash memory and 80 KB RAM for safety applications Datasheet - production data – Quadrature decode with rotation direction flag – Double buffer input capture and output compare LQFP100 14 x 14 mm Features 64 MHz, single issue, 32-bit CPU core complex (e200z0h) – Compliant with Power Architecture® embedded category – Variable Length Encoding (VLE) Memory organizazion – Up to 1024 KB on-chip code Flash memory with additional 64 KB for EEPROM emulation (data flash), with ECC, with erase/program controller – Up to 80 KB on-chip SRAM with ECC Fail safe protection – ECC protection on system SRAM and Flash – Safety port – SWT with servicing sequence pseudorandom generator – Power management – Non-maskable interrupt for both cores – Fault collection and control unit (FCCU) – Safe mode of system-on-chip (SoC) – Register protection scheme Nexus® L2+ interface Single 3.3 V or 5 V supply for I/Os and ADC 2 on-platform peripherals set with 2 INTC 16-channel eDMA controller with multiple transfer request sources General purpose I/Os 2 general purpose eTimer units – 6 timers, each with up/down count capabilities – 16-bit resolution, cascadable counters January 2015 This is information on a product in full production. Communications interfaces – 2 LINFlex modules (LIN 2.1, 1 × Master/Slave, 1 × Master Only) – 5 DSPI modules with automatic chip select generation – 2 FlexCAN interfaces (2.0B Active) with 32 message buffers – 1 Safety port based on FlexCAN; usable as third CAN when not used as safety port – 1 FlexRay™ module (V2.1) with dual or single channel, 64 message buffers and up to 10 Mbit/s 2 CRC units with three contexts and 3 hardwired polynomials 10-bit A/D converter – 27 input channels and pre-sampling feature – Conversion time < 1 μs including sampling time at full precision – Programmable cross triggering unit (CTU) – 4 analog watchdog with interrupt capability On-chip CAN/UART Bootstrap loader with boot assist module (BAM) Ambient temperature ranges: –40 to 125 °C Aerospace and Defense features – Dedicated traceability and part marking – Production parts approval documents available – Adapted Extended life time and obsolescence management – Extended Product Change Notification process – Designed and manufactured to meet sub ppm quality goals – Advanced mold and frame designs for Superior resilience to harsh environment (acceleration, EMI, thermal, humidity) – Single Fabrication, Assembly and Test site – Dual internal production source capability

Crossbar switch (XBAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Enhanced direct memory access (eDMA) . . . . . . . . . . . . . . . . . . . . . . . 14 On-chip flash memory with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 On-chip SRAM with ECC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Interrupt controller (INTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 System clocks and clock generation . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Frequency modulated phase-locked...

Contents On-chip voltage regulator (VREG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Package pinouts and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . 27 2.1 Power supply and reference voltage pins . . . . . . . . . . . . . . . . . . . . . . . 29 Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 General notes...

IEEE 1149.1 interface timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 External interrupt timing (IRQ pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 4.2.1 LQFP144 mechanical outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . 97 LQFP100 mechanical outline drawing . . . . . . . . . . . . . . . . . . . . . . . . . . 99

List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. RPC56xP54/60 device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 RPC56xP54/60 device configuration difference...

List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. RPC56xP54/60 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 LQFP176 pinout (top view) . ....

Document overview This document provides electrical specifications, pin assignments, and package diagrams for the RPC56xP54/60 series of microcontroller units (MCUs). It also describes the device features and highlights important electrical and physical characteristics. For functional characteristics, refer to the device reference manual. Description This 32-bit system-on-chip (SoC) microcontroller family is the latest achievement in integrated application controllers. This family is one of a series of next-generation integrated microcontrollers based on the Power Architecture technology. The...