Synthesized Clock Generator CG635 — DC to 2.05 GHz low-jitter clock generator CG635 Synthesized Clock Generator · Clocks from DC to 2.05 GHz · Random jitter <1 ps rms · 16 digits of frequency resolution · 80 ps rise and fall times · CMOS, PECL, ECL, LVDS, RS-485 outputs · Phase control and time modulation · PRBS for eye-pattern testing (opt.) · OCXO and rubidium timebase (opt.) The CG635 generates extremely stable square wave clocks between 1 µHz and 2.05 GHz. The instrument’s high frequency resolution, low jitter, fast transition times, and flexible output levels make it ideal for use in the development and testing of virtually any digital component, system or network. Clean clocks are critical in systems that use high-speed ADCs or DACs. Spurious clock modulation and jitter create artifacts and noise in acquired signals and in reconstructed waveforms. Clean clocks are also important in communications systems and networks. Jitter, wander, or frequency offsets can lead to high bit error rates, or to a total loss of synchronization. The CG635 can provide the clean, stable clocks required for the most critical applications. Output Drivers The CG635 has several clock outputs. The front-panel Q and –Q outputs provide complementary square waves at standard logic levels (ECL, PECL, LVDS or +7 dBm). The square wave amplitude may also be set from 0.2 V to 1.0 V, with an offset between –2 V and +5 V. These outputs operate from DC to 2.05 GHz, have transition times of 80 ps, have a source impedance of 50 Ω, and are intended to drive 50 Ω loads. Output levels double when these outputs are unterminated. The front-panel CMOS output provides square waves at standard logic levels. The output may also be set to any Stanford Research Systems

CG635 Synthesized Clock Generator Phase and Time Modulation The clock phase can be adjusted with high precision. The phase resolution is one degree for frequencies above 200 MHz, and increases by a factor of ten for each decade below 200 MHz, with a maximum resolution of one nano-degree. This allows clock edges to be positioned with a resolution of better than 14 ps at any frequency between 0.2 Hz and 2.05 GHz. The timing of clock edges can be modulated over ±5 ns via a rear-panel time-modulation input. The input has a sensitivity of 1 ns/V and a bandwidth from DC to over 10 kHz, allowing an...

CG635 Synthesized Clock Generator The CG635 can provide a wide range of clean, precise clocks for the most critical timing requirements. The instrument is an essential tool for demonstrating a system’s performance with a nearly ideal clock, and for understanding a system’s susceptibility to a compromised clock. The CG635 has the frequency range, precision, stability, and jitter-free performance needed to fulfill all your clock requirements. 622.08 MHz clock with Rb or OCXO timebase 622.08 MHz clock with standard timebase 10 MHz clock with Rb or OCXO timebase 10 MHz clock with standard timebase...

CG635 Synthesized Clock Generator Clock Jitter Matters Square wave clocks are used in virtually every digital system. Two examples of applications that benefit from very stable clocks are discussed below. Fast ADCs and DACs When analog signals are digitized by ADCs or reconstructed by DACs, their finite resolution creates a quantization noise of about ½ LSB. Timing jitter also creates noise, which adds to the quantization noise. The figure below shows that a clock jitter of ∆tj causes a sampling noise of ∆v, which is the product of the signal slope and the clock jitter. This noise increases linearly...

CMOS Output Range DC, 1 µHz to 2.05 GHz Resolution 16 digits (f ≥ 10 kHz), 1 pHz (f < 10 kHz) Accuracy ∆f < ±(2 × 10–19 + timebase error) × f Settling time <30 ms Timebase (+20 °C to +30 °C ambient) Output Front-panel BNC Frequency range DC to 250 MHz Low level –1.00 V ≤ VLOW ≤ +1.00 V Amplitude 500 mV ≤ VAMPL ≤ 6.00 V (VAMPL ≡ VHIGH – VLOW) Level resolution 10 mV Level error <2 % of VAMPL + 20 mV Transition time <1 ns (20 % to 80 %) Symmetry <500 ps departure from nominal 50 % Source impedance 50 Ω (reverse terminates cable reflection) Load impedance Unterminated 50 Ω cable of any length Attenuation...