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Mixed Signal Systems A/D Converter Lineup CXA3246Q

Mixed Signal Systems A/D Converter Lineup CXA3246Q

Product catalog summary

Description: The CXA3246Q is an 8-bit high-speed flash A/D converter designed for digitizing analog signals at a maximum rate of 120MSPS. It supports ECL, PECL, or TTL digital input levels and provides a TTL digital output level with a 1:2 demultiplexed output.

Features:

Linearity error: ±0.5LSB or less
High-speed operation up to 120MSPS
Low input capacitance of 10pF
Wide analog input bandwidth of 250MHz
Low power consumption of 500mW
1:2 demultiplexed output and 1/2 frequency-divided clock output
Compatible with ECL, PECL, and TTL digital input levels
Single +5V power supply operation
Surface mounting package (48-pin QFP)

Applications: Ideal for magnetic recording (PRML), communications (QPSK, QAM), LCDs, and digital oscilloscopes.

Absolute Maximum Ratings:

Supply voltage: -0.5 to +7.0V
Analog input voltage: VRT - 2.7 to AVCC V
Storage temperature: -65 to +150°C
Allowable power dissipation: 1.6W

Recommended Operating Conditions:

Supply voltage: +4.75 to +5.25V
Analog input voltage: VRB to VRT
Reference input voltage: VRT +2.9 to +4.1V, VRB +1.4 to +2.6V
Maximum conversion rate: 100MSPS (Straight mode), 120MSPS (DMUX mode)
Ambient temperature: -20 to +75°C

Pin Description: Detailed pin configurations and descriptions for digital and analog power supplies, reference voltages, clock inputs, and data outputs are provided.

Electrical Characteristics: Includes resolution, linearity errors, input capacitance, reference resistance, digital input/output voltages, and switching characteristics.

Operation Modes:

DMUX Mode: SELECT pin set to VCC. The clock frequency is divided by 2, and data is output after demultiplexing, operating at a minimum of 120MSPS.
Straight Mode: SELECT pin set to GND. Data output is synchronized with the clock frequency, operating at a minimum of 100MSPS.

Digital Input Level and Supply Voltage Settings: Supports ECL, PECL, and TTL logic input levels. Power supplies must match the logic input level, with specific voltage settings provided.

Application Circuits: Various application circuits are provided for different input configurations (ECL, PECL, TTL), detailing power supply connections and data latch arrangements.

Notes on Operation:

Ensure proper impedance matching for stable operation.
Power supply and grounding are critical for performance, especially at high speeds. Use wide ground patterns and separate analog and digital grounds.
Turn on analog and digital power supplies simultaneously.
Use ceramic chip capacitors for noise suppression.
Keep digital output wiring short to prevent signal degradation.
Proper bypassing of VRT and VRB pins is necessary to avoid high-frequency noise.

Representative Characteristics: Graphs illustrate current consumption versus ambient temperature and conversion rate, analog input current versus voltage, and SNR versus input frequency, aiding in understanding performance under different conditions.

Package Outline: The CXA3246Q is housed in a 48-pin QFP package made of epoxy resin with palladium plating, with detailed dimensions and materials specified.

Catalog excerpts

Mixed Signal Systems A/D Converter Lineup CXA3246Q-5

CXA3246Q Pin Description and I/O Pin Equivalent Circuit PinNo.SymbolI/O Standardvoltage level Equivalent circuitDescription Analog ground.Separated from the digital ground.Analog power supply.Separated from the digital power supply.Digital ground.Digital power supply.Digital power supply.Ground for ECL input. +5V for PECL and TTL inputs. Digital power supply.5V for ECL input. Ground for PECL and TTL inputs.No connected pin.Not connected with the internal circuits. > CC DGND1DGND2DV > CC 1DV > CC 2DGND3 DV > EE 3 GND+5V(typ.)GND+5V(typ.)+5V (typ.)(With a single power supply)GND(With dual power...

Open the catalog to page 5

Mixed Signal Systems A/D Converter Lineup CXA3246Q-19

CXA3246Q Notes on Operation? The CXA3246Q has the PECL and TTL input pins for the clock and reset input pins. When the clock is inputin PECL level, inputting the reset signal in PECL level is recommended. Also, when the clock is input in TTL level, inputting the reset signal in TTL is recommended. ? The impedance of the input signal should be properly matched to ensure the CXA3246Q's stable operation atthe high speed. ? The power supply and grounding have a profound influence on converter performance. The power supplyand grounding method are particularly important during high-speed operation....

Open the catalog to page 19

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