High Power DPDT Switch CXM3593UR Description The CXM3593UR is a high power DPDT switch for wireless communication systems. This IC has a 1.8 V CMOS compatible decoder. The Sony GaAs junction gate pHEMT (JPHEMT) MMIC process is used for low insertion loss and high linearity. (Application: LTE/CDMA/GSM/UMTS Handsets ) Features ◆ Low Insertion loss: 0.26dB (Typ.) (Cellular Band ) 0.45 dB (Typ.) (IMT2000 ) ◆ Low voltage operation: VDD = 2.5 V ◆ No DC blocking capacitors required on RF ports ◆ 2 Control input ◆ Small package size: UQFN-12 pin (2.0 mm × 2.0 mm) ◆ Lead-Free and RoHS compliant Structure GaAs JPHEMT MMIC switch, CMOS decoder Moisture Sensitivity Moisture Sensitivity Level for this part is MSL= 2 (Tentative) Absolute Maximum Ratings ♦ Bias voltage ♦ Maximum input power This IC is ESD sensitive device. Special handling precautions are required. 1

Block Diagram DPDT Antenna Switch RF3 Decoder Logic MMIC Switch Active path

DC Bias Condition Parameter

Target Electrical Characteristics (Ta = 25 °C, VDD = 2.5 V, Vctl = 0/1.8 V) Item Insertion Loss All ports in active paths Inter modulation distortion in Rx Band Switching speed Wakeup time Control current Supply current Electrical characteristics are measured with all RF ports terminated in 50 Ω. *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 Pin = 25 dBm, 704 to 787 MHz (Band 13, Band 17) Pin = 26 dBm, 824 to 960 MHz (Band 5, Band 8) Pin = 26 dBm, 1710 to 1990 MHz (Band 1 Tx, Band 2 Tx, Band 3 Tx, Band 4 Tx) Pin = 10 dBm, 2110 to 2170 MHz (Band 1 Rx, Band 4 Rx) Pin = 26 dBm, 2500 to 2690 MHz (Band 7) Pin =...

Recommended Circuit *1 No DC blocking capacitors are required on all RF ports. (Except sourcing DC bias) *2 The DC levels of all RF ports are GND. *3 L1 (27nH) and C1(12pF) are recommended on Ant port for ESD protection. *4 C2(100pF) is recommended on VDD pin for Decoupling Capacitor.

Recommended Land Pattern

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