SP12T Antenna Switch Module for 7TRx/2Tx/3Rx CXM3583AUR Description The CXM3583AUR is a SP12T antenna switch module for GSM/UMTS/CDMA/LTE multi-mode handset. The CXM3583AUR has a built-in dual low pass filter and a +1.8 V CMOS compatible decoder. The Sony GaAs junction gate PHEMT (JPHEMT) MMIC process is used for low insertion loss and high linearity. The device has low BOM with no DC blocking Capacitor. 0.50 dB (Typ.) TRx (Cellular Band) 0.60 dB (Typ.) TRx (IMT Tx Band) High Linearity: No DC Blocking Capacitors except sourcing DC bias. Small Package Size: Lead-Free and RoHS Compliant. Structure GaAs Junction Gate PHEMT (JPHEMT) MMIC Switch, CMOS Decoder. Moisture Sensitivity Moisture Sensitivity Level for this part is MSL = 2 This IC is ESD sensitive device. Special handling precautions are required.

Preliminary Block Diagram SP12T Antenna Switch Module Decoder Logic *Built-in SW Control Circuit

Preliminary Truth Table CTL Active State Switch State (*1) State (*1) State ”L” means a switch “OFF”, State ”H” means a switch “ON”

Preliminary DC Bias Conditions Absolute Maximum Ratings ◆ Supply voltage

Preliminary Electrical Characteristics VDD = 2.5 V, Insertion Loss (*)Electrical Characteristics are measured with all RF ports terminated in 50 Ω.

Preliminary Electrical Characteristics Corresponding Band of TRx (UMTS/CDMA) *1: Pin = 26 dBm, 1710 MHz to 1990 MHz (Band 1 Tx, Band 2 Tx, Band 3 Tx, Band4 Tx) *12A: Measured with the recommended Circuit1, Circuit2 *12B: Measured with the recommended Circuit3 (*)Electrical characteristics are measured with all RF ports terminated in 50 .

Preliminary Triple Beat Ratio VDD = 2.5 V, Item Triple Beat Ratio Triple Beat Product *1 at TRx [MHz] (*)Electrical characteristics are measured with all RF ports terminated in 50 . *12A:Measured with the recommended Circuit1, Circuit2 (*)Electrical characteristics are measured with all RF ports terminated in 50 . *12A:Measured with the recommended Circuit1, Circuit2

Preliminary Recommended Circuit 1 Operation Frequency Range : 0.7 GHz to 2.7 GHz *1: No DC blocking capacitors are required on all RF ports. (Except sourcing DC bias) *2: DC levels of all RF ports are GND. *3: L1 Inductor(22 nH) and C1 Capacitor(12 pF) are recommended on Ant port for ESD protection. *4: C2 Capacitor(100 pF) is recommended.

Preliminary Recommended Circuit 2 Operation Frequency Range : 0.45 GHz to 2.7 GHz *1: No DC blocking capacitors are required on all RF ports. (Except sourcing DC bias) *2: DC levels of all RF ports are GND. *3: L1 Inductor(47 nH) and C1 Capacitor(22 pF) are recommended on Ant port for ESD protection. *4: L2 Inductor(12 nH) is recommended on a TRx port assigned for Band I to improve IMD2 performance(Rx-Tx(190 MHz)). *5: C2 Capacitor(100 pF) is recommended.

Preliminary Recommended Circuit 3 2nd Harmonic Improvement at LTE : Band13 *1: No DC blocking capacitors are required on all RF ports. (Except sourcing DC bias) *2: DC levels of all RF ports are GND. *3: L1 Inductor(22 nH) and C1 Capactor(12 pF) are recommended on Ant port for ESD protection. *4: C2 Capacitor(100 pF) is recommended. *5: L3 Inductor(1.8 nH) and C3 Capacitor(6.6 pF) are recommended when TRx1 is assigned for Band 13. L4 Inductor(1.8 nH) and C4 Capacitor(7.8 pF) are recommended when TRx3 is assigned for Band 13. L5 Inductor(1.8 nH) and C5 Capacitor(6.6 pF) are recommended when TRx7...

UQFN-30P Macro drawing (Reference) ■PKG : 3.8mmX3.0mm tHe t a I mask thickness : llOtfm : Metal area in board (* I ) Mask (Open area) Resist (Open area)

1) TYPE NO. ( MAX 5 CHARACTERS ) IN SECTION C_ ( FOR MORE THAN 5 CHARACTERS FOLLOW RULES FOR ABBREVIATIONS.) t B= 3 CHARACTERS , B' = 4 CHARACTERS. FOLL RULES FDR ABBREVIATIONS.) 3) PUT THE POSITION OF A CHARACTER REFERENCE FROM THE RIGHT SIDE.

Preliminary Note Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.