Switchable Step Capacitor CXG1407XR Description The CXG1407XR can be selected four kinds of built-in capacitor (1 to 8 pF), or two path. Sony JPHEMT GaAs process is utilized for low insertion loss, high linearity and high Q Factor capacitance with high accuracy. (Applications: Antenna tuning, i.e Felica characteristics) Features ◆ Low insertion loss (internal switch) ◆ Low voltage drive: 2.4 to 3.3 V ◆ High Q Factor, high accuracy capacitance ◆ Robustness against ESD ◆ Small package: 12-pin XQFN (2.0 mm × 2.0 mm × 0.4 mm Max.) ◆ Lead-Free and RoHS Compliant Structure GaAs Junction Gate pHEMT (JPHEMT) MMIC Absolute Maximum Ratings Input voltage Max. Maximum input. Operating temperature Storage temperature This IC is ESD sensitive device. Special handling precautions are required.

Truth Table CTLA L H Note) 1. [—] : Don't Care 2. It is prohibited that all control inputs are L. DC Bias Condition (Temperature = –30 to +90 °C) Item

Electrical Characteristics (Ta = 25 °C, Vctl = 2.4 to 3.3 V/0 V) Item Switching speed Capacitance ratio Pin = 0 dBm, frequency = 13.56 MHz Pin = 0 dBm, frequency = 900 MHz Pin = 27 dBm, frequency = 900 MHz Frequency = 900 MHz Pin = 0 dBm, Calculated by S-parameter at 13.56 MHz

CTLB CTLC CTLD

Mask (Open area) Resist (Open area) A netalUc layer [G H D) 5 oecg^arv f&r t h I & area to keep the performance Zu Layer Tor Terminal Land Core Material Cu L-Si Y § r Tor T -6 r ffi i n S L L an C

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1) LOT ND. ( MAX 3 CHARACTERS ■ SERIAL CODE ) IN SECTION B._ 1 FOLLOW RULES FDR ABBREVIATIONS._ MANUFACTURING YEAR IS DI SPLAYED BY FOLLOWING BYNARY BIT SYSTEM. ) A YEAR CODE ( THE 1ST BIT OF A BINARY SYSTEM BIT SYSTEM IS 01 SPLAYED IN 1 DOT ) IN SECTION a. A YEAR CODE ( THE 2ND BIT OF A BINARY SYSTEM BIT SYSTEM IS DISPLAYED IN 1 DOT ) IN SECTION b. A YEAR CODE! THE 3RD BIT OF A BINARY SYSTEM BIT SYSTEM IS DISPLAYED IN 1 DOT ) IN SECTION c. A YEAR CODE ( THE 4TH BIT OF A BINARY SYSTEM BIT SYSTEM IS DISPLAYED IN 1 DOT ) IN SECTION J. 2) TYPE NO. ( MAX 2 CHARACTERS ) IN SECTION C._ ( FOR MORE THAN...

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