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ICanalyst
1 /4Pages

ICanalyst

ICanalyst
1 /4Pages

Catalog excerpts

ICanalyst-1

Advanced Verification Environment Analog/Mixed-Signal Verification ICanalyst datasheet Statistical Analysis Monte Carlo Circuit Design Optimization --' Performance Results Yield Analysis __ Parameter Screening ICanalyst Analog Design Verification Parallel Simulation LSF/GRID Multi Testbench Documentation Datasheet ICanalyst™ manages the validation of custom analog, RF ICs using specification-driven and process variation advanced verification techniques. Advanced Verification Cockpit As designs become more complex and geometries continue to shrink, variation-aware design techniques are essential. Designing and verifying the transistors that compose integrated circuits is increasingly difficult. With modern processes, many more corners are needed to bracket variation; including temperature sweeps, low-power voltage ranges, statistical process variations (die-to-die and within-die), and process corner sweeps resulting from predefined digital corners. ICanalyst™ is an advanced verification cockpit that enables designers to easily leverage the full complement of Mentor Graphics analog mixed-signal solutions for design verification and analog cell characterization: Questa® ADMS for mixed-signal, Eldo® (Classic and Premier) for SPICE, and ADiT™ for Fast-SPICE applications. ICanalyst accomplishes this through an optimized design flow purposed for automating repetitive tasks. FEATURES AND BENEFITS: ■ Improves sign-off confidence by increasing verification coverage and shortening verification schedule ■ Assists IP library validation with quick set up and easy exploration of results ■ Facilitates design reviews and knowledge-sharing among design teams with automated document generation ■ Saves time on verification scripting, output file parsing, and results interpretation/management ■ Manages multiple designs with continual updates and multiple testbenches with incremental modifications ■ Optimizes simulation efficiency with integration of load balancing tools, such as Platform LSF® and Sun® Grid Engine ■ Provides spreadsheets and graphical representations of simulation result data ■ Offers a specification-driven environment ■ Enables real-time simulation result and yield browsing ■ Interfaces with ReqTracer to provide requirement tracing flow ■ Interfaces with the Questa verification plan and Questa UCDB —Menlor Graphics’

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ICanalyst-2

true mixed-signal waveform viewer and their own schematic nets, pins, or instances. Additionally, operatingpoint simulation results can be back-annotated to the schematic window from any test, to facilitate debugging a design’s bias point. Simulation Plan Management Tests are summarized in the Simulation Plan table of the ICanalyst interface. This represents the executable simulation plan that covers the verification strategy. Either the entire simulation plan or a subset of it can be run. From this view, the designer can update the pass/fail simulation status on a test-basis, perform real-time...

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ICanalyst-3

PVT Sweeps and Statistical Analysis Process voltage temperature (PVT) sweeps and statistical analysis using Monte Carlo methods are managed in one location (the Parameters/Scenarios window), for fast and accurate design verification. Once the designer has determined the desired verification strategy, he or she can generate all of the necessary simulation runs from this view. This ensures complete coverage of all the defined PVT sweeps and Monte Carlo runs. The designer can always come back to this view to edit the verification strategy and easily regenerate tests. 2D, 3D, Histogram, and Yield...

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ICanalyst-4

Optimization and Sensitivity Flow Eldo optimization engine is integrated with ICanalyst, providing access to technologies that fine-tune design variables. A sensitivity flow helps designers determine which design variables are truly key parameters that, with slight variations, influence design output performance the most. After running through the sensitivity flow in ICanalyst, a set of the most important design variables is selected. This leads to more efficient optimization, resulting in time savings along with finely tuned designs. Integration with Mentor AMS Tools EZwave integration with...

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