HDL Designer
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Catalog excerpts

HDL Designer - 1

FPGA Design Creation D A T A S H E E T FEATURES AND BENEFITS: ■■ Ensures a structured FPGA/ASIC design flow ■■ Delivers a flexible environment for upstream and downstream tools and processes ■■ Reduces design creation time through automation and also code and diagram generation ■■ Supports consistent RTL coding through flexible design checking ■■ Assures SW- and HW-addressable register consistency ■■ Greatly aids design reuse HDL Designer is a powerful HDL-based environment used by individual engineers and engineering teams worldwide to analyze, create and manage complex FPGA and ASIC designs. ■■ Enables rapid and easy documentation with visualization and HTML snapshots ■■ Helps meet safety standards compliance mandates Overview HDL Designer is a powerful HDL-based environment which delivers new approaches to design today’s most complex FPGAs and ASICs. HDL Designer is used worldwide by individual engineers and engineering teams to create, analyze and manage the design of these amazing devices. HDL Designer accelerates the productivity and predictability of the project by automating many flows and tasks. Automated rule checking, register generation and documentation and the powerful text, tabular and graphical creation editors save incredible amounts of engineering time and can minimize manually introduced errors. Tool integration and version management of the entire project help keep the team, tools and design process structured, but is still flexible enough through an API to augment existing design flows. Through this automation and project management, the overall quality of the project and resulting chip is improved and project risk greatly reduced. By using HDL Designer, savings and cost avoidance can be recognized immediately through this automation and will continue with future projects through better design reuse, consistency of coding and improved documentation. For safety- and mission-critical projects, HDL Designer’s design checking, version management, register generation and documentation support adherence to regulatory compliance mandates such as DO-254 and ISO 26262. Project Management and Team-based Design HDL Designer tackles the design management problem by automating and simplifying project and team management throughout the design flow. HDL Designer provides the designer and design team with interfaces to other design tools within the flow including ReqTracer, Questa/ModelSim, Precision, and FPGA vendor and other EDA tools for automated compilation, simulation, invoke and interactive debug. To ensure consistency, teams use the same preferences, tools, tool versions, coding templates and tasks to automate repetitive flows. The flexible project import and API enable HDL Designer to easily fit into existing design processes and to build custom design flows.

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HDL Designer - 2

The simplified version management systems interface manages all design project related data for an individual or team of engineers. HDL Designer supports Subversion, IBM® ClearCase, CVS, RCS, Dassault® DesignSync, CliosSoft Documentation of the complete project is easily created via OLE, print and graphics export. Project snapshots in HTML reduce design review preparation time creation effort. Automated Design Rule Checking Automated design checking reduces project code review effort, design flaws early in the development cycle—before simulation, synthesis and production—where it is less...

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