Constraint Editor System System Design Reduce Costs and Accelerate Time-to-Market D A T A S H E E T MAJOR BENEFITS: • Single, integrated constraint entry and edit tool for design, layout, analysis, and manufacturing rules. • Powerful and easy-to-use spreadsheetlike GUI guided by the design database and cross probing to applications. • Hierarchical constraint entry speeds input of complex rules on many objects. • Speeds time-to-market with informal and formal constraint reuse, concurrent constraint entry, and editing. CES spreadsheets integrated to schematic and layout environments. • Improves design productivity with extensions allowing in-tool constraint editing. Introduction As PCBs increase in complexity and density, a higher percentage of the design must be implemented with strict adherence to design rules. Manual documentation, translation, and interpretation of design rules often cause longer product development cycles and increased costs. The Constraint Editor System (CES) provides a fully integrated, constraint-driven design methodology that reduces design costs and time-to-market by automating design rules communication and eliminating unnecessary PCB prototypes and re-spins. CES provides both electrical engineers and PCB designers with direct control over the most advanced routing technology in AutoActive to solve current and future system design requirements. Constraint Integration throughout the Design Flow CES supports bi-directional cross probing, highlighting and selection between a spreadsheet-based constraint interface, and schematic capture and physical design tools in the flow. Constraint values are fully synchronized during the forward and backward annotation processes with intelligent handling of connectivity changes. CES also supports importing constraint templates developed with HyperLynx LineSim®. Concurrent Design Increased complexity puts more pressure on design teams to get things done on time. CES allows many designers to work on the constraint data at the same time. The CES database architecture was designed to allow multiple edits simultaneously. This eliminates overhead of manual techniques that other systems must use. CES provides locking mechanisms to prevent concurrent users from editing the same data, and it also provides notification of who is changing which data to the team. This means projects schedules can be met by applying more resources to a project. Constraint Reuse CES allows reuse of many of the simple and complex rules that have been created. Constraint templates can be used to copy constraints from one net to another net or an entire bus, including custom ordering, net constraints, and pin pair constraints. These templates can be used on other designs as well. CES also supports Reusable Blocks, allowing designers to use an entire circuit, constraints, and physical layout data from one design into another design. Reusing constraints saves time and improves quality by allowing the designer to use a previously completed and verified circuit instead of creating a new one. w w w. m e nto r. co m /p cb

Hierarchical Rule Classes Differential Pair Creation With CES, users can create hierarchical rule classes that greatly ease the association of constraints to design ob- jects. With more common "flat" systems, users must apply constraints to many individual nets or pins, but with the use of hierarchy, and the inheritance of constraints that this facilitates, those same nets can be constrained by one rule at the class level. This greatly reduces the number of constraints manually entered in the design; when changes occur, due to packaging or other requirement changes, constraint modification is...