Version: 2.9 Release Date: 2024-09-14 Shenzhen Goodix Technology Co., Ltd.

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN Product Datasheet Rev. 2.9 (2024-09-14) VIII

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN Product Datasheet Rev.2.9 (2024-09-14) XIII

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN Product Datasheet Rev.2.9 (2024-09-14) XVII

GODDiX Contents GR551x Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. DS-GR5-00030-EN Product Datasheet Rev.2.9 (2024-09-14) XVIII

The Goodix GR551x family is a single-mode, low-power Bluetooth 5.1 System-on-Chip (SoC). It can be configured as a Broadcaster, an Observer, a Central, or a Peripheral and supports the combination of all the above roles, making it an ideal choice for Internet of Things (IoT) and smart wearable devices. Based on ARM Cortex -M4F CPU core, the GR551x series integrates Bluetooth 5.1 Protocol Stack, a 2.4 GHz RF transceiver, on-chip programmable Flash memory, RAM, and multiple peripherals. GR551x SoCs are available in multiple packages (see Table 1-1) that meet your diverse project demands. GR5515IENDU...

◦ Built-in Memory Protection Unit (MPU) supporting eight programmable regions ◦ Hardware Floating Point Unit (FPU) ◦ Built-in Nested Vectored Interrupt Controller (NVIC) ◦ Non-maskable Interrupt (NMI) input ◦ Serial Wire Debug (SWD) with 6 breakpoints, two watchpoints, and a debug timestamp counter ◦ 51 ^A/MHz execution from Flash @ 3.3 V, 64 MHz On-chip memory ◦ 256 KB SRAM with retention capabilities (four 8 KB SRAM blocks and seven 32 KB SRAM blocks) for GR5515 series SoCs, and 128 KB SRAM with retention capabilities (four 8 KB SRAM blocks and three 32 KB SRAM blocks) for the GR5513 SoC ◦...

- Hash-based Message Authentication Code (HMAC-SHA256) - True random number generator (TRNG) ◦ Comprehensive security operation mechanism: - Secure boot - Encrypted firmware running directly from Flash - eFuse for encrypted key storage - Differentiate application data key and firmware key, supporting one data key per device/product I/O peripherals - 26 general-purpose I/O (GPIO) pins - 8 always-on I/O (AON IO) pins, supporting wakeup from deep sleep mode - 5 mixed signal I/O (MSIO) pins, configurable to be digital/analog signal interface Timer ◦ Two general-purpose, 32-bit timer modules ◦ A timer...

Ultra deep sleep mode: 1.8 µA (Typical), no SRAM retention Off mode: 0.15 uA (Typical), nothing on except VBAT, and chip in reset mode Operating temperature range: -40°C to +85°C 1.2 Block Diagram Figure 1-1 shows the block diagram of GR551x. PMU Subsystem Cache Ctrl Cache 8 KB Bluetooth Subsystem Analog SADC Voltage sensor Temperature sensor Packet Buffer Acve Mode Idle Mode Deep Sleep Mode Ultra Deep Sleep Mode Figure 1-1 GR551x block diagram A 2.4 GHz transceiver and a digital communication core that supports Bluetooth LE 5.1. Copyright © 2024 Shenzhen Goodix Technology Co., Ltd. Rev.2

An ARM Cortex -M4F with all the required memories and peripherals. ◦ Security cores that can be used for application security and to secure boot implementation. • Power Management Unit (PMU) Subsystem ◦ All the required power management modules to supply sufficient power to both internal modules and external peripherals. ◦ Modules required for ultra-low-power operation are in standby mode. CPLL_192M, RNG_OSC, LFRC_32K, w akeup GPIOs (Wake up), low-power comparator (LP Comp.), and power state controller (Power Sequencer) are used to control the state of different modules. GR551x can be used in...

GODDiX Pinout Digital I/O & supplies pin Analog pin Figure 2-1 GR5515IGND/GR5515IENDU QFN56 package pinout Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.

GODDiX Pinout Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.

GODDiX Pinout Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.

GODDiX Pinout Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.

GODDiX Pinout Digital I/O & supplies pin Analog pin External Flash pin Figure 2-2 GR5515I0NDA QFN56 package pinout Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.

GODDiX Pinout Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.

GODDiX Pinout Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.

GODDiX Pinout Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.

GODDiX Pinout GODDiX Pinout DGND DGND VDDIO 1 TEST MODE AON GPIO0 GPIO8 GPIO12 VBATL MSIO1 RTC_IN RTC_OUT AON_GPIO2 Figure 2-3 GR5515RGBD BGA68 package pinout Table 2-3 GR5515RGBD BGA68 package pin descriptions Copyright © 2024 Shenzhen Goodix Technology Co., Ltd.