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Dual 2-Bit Adder / Subtractor

Dual 2-Bit Adder / Subtractor

Dual 2-Bit Adder / Subtractor

Product catalog summary

Description: The MC10H180 is a high-speed, low-power, general-purpose dual 2-bit adder/subtractor. It is designed for use in special-purpose adders/subtractors or high-speed multiplier arrays. The inputs for each adder include Carry-in, Operand A, and Operand B, while the outputs are Sum, Sum, and Carry-out. Common select inputs control the inversion of Operand A for subtraction and Operand B.

Features:

  • Typical propagation delay of 1.8 ns from operand and select to output.
  • Typical power dissipation of 360 mW.
  • Improved noise margin of 150 mV over the operating voltage and temperature range.
  • Voltage compensated and MECL 10K™ compatible.
  • Available in Pb-free packages.

Logic Diagram: The document includes a logic diagram and DIP pin assignment for the MC10H180, detailing the connections and functions of each pin.

Maximum Ratings: The document specifies the maximum ratings for power supply, input voltage, output current, operating temperature range, and storage temperature range. Exceeding these limits may cause device damage.

Electrical Characteristics: The electrical characteristics table provides details on power supply current, input current high and low, high and low output voltages, and high and low input voltages across different temperatures (0°, 25°, 75°).

AC Parameters: The AC parameters table lists the propagation delay, rise time, and fall time for different operations and temperatures.

Function Select Table and Truth Table: These tables outline the functions and logic states for different select inputs, showing how the device performs addition, subtraction, and reverse subtraction.

Ordering Information: The document provides details on available packages, shipping units, and Pb-free options.

Package Dimensions: Detailed dimensions and tolerances for different package types (PLLC-20, CDIP-16, PDIP-16) are provided, including notes on measurement standards and allowances for mold flash and other manufacturing variances.

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Catalog excerpts

Dual 2-Bit Adder / Subtractor -1

© Semiconductor Components Industries, LLC, 2006 February, 2006 - Rev. 7 1 Publication Order Number: MC10H180/D MC10H180 Dual 2-Bit Adder/Subtractor Description The MC10H180 is a high-speed, low-power, general-purpose adder/ subtractor. It is designed to be used in special purpose adders/subtractors or in high-speed multiplier arrays. Inputs for each adder are Carry-in, Operand A, and Operand B; outputs are Sum, Sum and Carry-out. The common select inputs serve as a control line to Invert A for subtract, and a control line to Invert B. Features • Propagation Delay, 1.8 ns Typical, Operand and Select to Output • Power Dissipation, 360 mW Typical MC10H180 • Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) • Voltage Compensated • MECL 10K™ Compatible • Pb-Free Packages are Available* LOGIC DIAGRAM DIP PIN ASSIGNMENT S1 S0 COUT CIN A0 B0 SELA VEE VCC S0 S1 COUT CIN A1 B1 SELB 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 10 S1 S0 CIN BO AO SELB SELA VCC = PIN 16 VEE = PIN 8 7 9 5 4 6 15 2 11 12 3 14 1 13 SELA SELB A1 B1 CIN S0 COUT S1 COUT POSITIVE LOGIC ONLY A’ = A SELA = ASELA B’ = B SELB = BSELB S = CIN (A’ B’ + A’ B’) + CIN(A’ B’ + A’ B’) COUT = CINA’ + CINB’ + A’ B’ Pin assignment is for Dual-in-Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. CDIP-16 L SUFFIX CASE 620A MARKING DIAGRAMS* PDIP-16 P SUFFIX CASE 648 http://onsemi.com *For additional marking information, refer to Application Note AND8002/D. See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. ORDERING INFORMATION 16 1 16 1 MC10H180P AWLYYWWG 1 16 MC10H180L AWLYYWW A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = Pb-Free Package PLLC-20 FN SUFFIX CASE 775 20 1 10H180G AWLYYWW 1 20

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Dual 2-Bit Adder / Subtractor -2

MC10H180 http://onsemi.com 2 Table 1. MAXIMUM RATINGS Symbol Characteristic Rating Unit VEE Power Supply (VCC = 0) -8.0 to 0 Vdc VI Input Voltage (VCC = 0) 0 to VEE Vdc Iout Output Current - Continuous - Surge 50 100 mA TA Operating Temperature Range 0 to +75 °C Tstg Storage Temperature Range - Plastic - Ceramic -55 to +150 -55 to +165 °C °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional...

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Dual 2-Bit Adder / Subtractor -3

MC10H180 http://onsemi.com 3 Table 4. FUNCTION SELECT TABLE Table 5. TRUTH TABLE SelA SelB Func- H S = A plust iBon INPUTS FUNCTION SelA SelB A0 B0 Cin S0 S0 Cout ADD SUBTRACT HHHH HHH H LLL LLLL L HHHH HHH H HHH HHHH H LLLL HHH H LLL LHHH H LLHH LLH H LLH HLLH H L HL H L HL H L HL HL HL H HLL H L HH L L HH L HLL H LHHL HLL H HLL HLHH L LLL H L HH H L HL L HHL H H L L H L H L S = A minus B S = B minus A S = 0 minus A minus B INPUTS FUNCTION SelA SelB A0 B0 Cin S0 S0 Cout REVERSE SUBTRACT HHHH HHH H LLL LLLL L LLLL LLL L LLL LLLL L LLLL HHH H LLL LHHH H LLHH LLH H LLH HLLH H L HL H L HL H L HL...

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Dual 2-Bit Adder / Subtractor -4

MC10H180 http://onsemi.com 4 PACKAGE DIMENSIONS -M- -N- -L- Y BRK W V D D 0.007 (0.180) M T L-M S N S 0.007 (0.180) M T L-M S N S X G1 0.010 (0.250) S T L-M S N S B U Z VIEW D-D 20 1 0.007 (0.180) M T L-M S N S 0.007 (0.180) M T L-M S N S 0.010 (0.250) S T L-M S N S C G VIEW S E J R Z A 0.004 (0.100) -T- SEATING PLANE 0.007 (0.180) M T L-M S N S 0.007 (0.180) M T L-M S N S H VIEW S K K1 F G1 20 LEAD PLLC CASE 775-02 ISSUE E NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. DIMENSIONS IN INCHES. 3. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT...

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Dual 2-Bit Adder / Subtractor -5

MC10H180 http://onsemi.com 5 PACKAGE DIMENSIONS CDIP-16 L SUFFIX CERAMIC DIP PACKAGE CASE 620A-01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. 5 THIS DRAWING REPLACES OBSOLETE CASE OUTLINE 620-10. F E N K C SEATING PLANE 0.25 (0.010) M T A M L DIM MIN MAX MIN MAX INCHES MILLIMETERS A 0.750 0.785 19.05 19.93 B 0.240 0.295 6.10 7.49 C --- 0.200 --- 5.08 D 0.015 0.020 0.39 0.50 E 0.050 BSC 1.27 BSC F 0.055...

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*Prices are pre-tax. They exclude delivery charges and customs duties and do not include additional charges for installation or activation options. Prices are indicative only and may vary by country, with changes to the cost of raw materials and exchange rates.