Introduction
This document is the XDRTM DRAM Product Guide, Revision 0.5, dated March 2006. It provides detailed information on the specifications, revisions, and ordering information for XDR DRAM products.

Change History
- Revision 0.1 (August 2003): First Copy
- Revision 0.2 (December 2004): Added C-die, D-bin
- Revision 0.3 (March 2005): Added 512Mb XDR DRAM
- Revision 0.4 (December 2005): Deleted code 17 in organization
- Revision 0.5 (March 2006): Added E-die

Product Specifications
- Density & Refresh: 256M with 16K/16ms (0.98us), 512M with 32K/16ms (0.49us)
- Organization: x2, x4, x8, x16
- Voltage: DRSL (1.8V, 1.2V)
- Banks: 8 Banks

Interface and Package
- Interface (VDD, VDDQ): Various configurations
- Package Type: BOC lead-free

Speed and Performance
- Data Frequency: Ranges from 2.4Gbps to 4.0Gbps
- tRAC and tRC: Varies with data frequency

Ordering Information
- Generations: M (1st Gen.), C (4th Gen.), E (6th Gen.), F (7th Gen.)
- Part Numbers: Detailed for different densities and configurations

Component Product Guide
- 256Mb (F-die): Available in 8 Banks with various configurations
- 512Mb (C-die): Available now with 8 Banks
- 512Mb (E-die): Available Q4’06 with 8 Banks

Key Codes
- Package Type Code: J for BOC lead-free
- Speed Code: A2, B3, C3, C4 indicating different data frequencies and clock cycles