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Digital to Analog Converters (DAC) RDA012LP

Digital to Analog Converters (DAC) RDA012LP
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Digital to Analog Converters (DAC) RDA012LP

Product catalog summary
Product Overview
The RDA012LP is a 12-bit, 1.5 GS/s low-power digital-to-analog converter (DAC) designed for high-performance applications. It features a differential analog output, offset binary input code format, and a spurious free dynamic range (SFDR) of up to 63 dBc at 1 GHz clock frequency.

Key Specifications
  • Resolution: 12 bits
  • Sampling Rate: 1.5 GS/s (2.0 GS/s typical)
  • Output Signal: 0 dBm
  • Power Supply: 3.3V
  • Power Dissipation: 700 mW
  • Package: 32 Lead QFP

Absolute Maximum Ratings
  • Supply Voltages: -0.3 to +0.3 V between GNDs and VCCs
  • Temperature Range: -15 to +85 °C (case), -40 to 125 °C (storage)

Electrical Specifications
  • DC Transfer Function: DNL and INL of ±2 LSB
  • Temperature Drift: 30 seconds warm-up time
  • Power Supply Requirements: 210 mA positive current, 700 mW power dissipation

Dynamic Performance
  • SFDR varies with clock frequency and output frequency, ranging from 53 dBc to 66 dBc
  • Rise and Fall Time: 350 ps

Operating Conditions
  • Clock Inputs: 200 to 1000 mV amplitude, 1500 to 2000 MHz frequency
  • Digital Inputs: High voltage 2.1 to 3 V, Low voltage 0 to 1.9 V

Pin Description
  • Power Supply: VCC and GND pins
  • Reference Voltages: VECL (2V), VREF (1.3V), VTT (1.3V)
  • Clock Inputs: CLKIP and CLKIN
  • Digital Inputs: DI<0-11>
  • Outputs: OUTP and OUTN

Theory of Operation
The DAC uses 4-bit segmentation for optimal performance, with LVPECL compatible inputs and a segmented current source to reduce glitch energy. The output is terminated at 50Ω, and the full-scale voltage is determined by VFS = 0.3xVREF.

Signal Description
  • High-Speed Input Clock: Differential, internally terminated with 50Ω
  • Data Input: Single-ended LVPECL compatible
  • Analog Output: Differential output with 50Ω termination
  • Reference: VREF supplies the reference voltage, optimized at 1.3V

Typical Performance
Graphs illustrate integral and differential non-linearity, SFDR, and signal spectra at various frequencies.

Package Information
The package is a 32 lead metal ceramic base, glass sidewall QFP with a heat sink slug, featuring gull-winged leads and a thermal impedance of approximately 15 °C/W.
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