4-wire Serial Interface Real Time Clock Module R2043K/T Series
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R2043K/T OUTLINE The R2043K/T is a CMOS real-time clock IC connected to the CPU by four signal lines, CE, SCLK, SI, SO, and configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is configured to generate interrupt signals with six selectable interrupts ranging from 0.5 seconds to 1 month. The 2 alarm interrupt circuits generate interrupt signals at preset times. As the oscillation circuit is driven under constant voltage, fluctuation of the oscillator frequency due to supply voltage is small, and the time keeping current is small (TYP. 0.45µA at 3V). The oscillation halt sensing circuit can be used to judge the validity of internal data in such events as power-on; The supply voltage monitoring circuit is configured to record a drop in supply voltage below two selectable supply voltage monitoring threshold settings. The 32.768kHz clock output function (N-channel open drain output) is intended to output sub-clock pulses for the external microcomputer. The oscillation adjustment circuit is intended to adjust time counts with high precision by correcting deviations in the oscillation frequency of the crystal oscillator. Since the package for these ICs are TSSOP10G (4.0x2.9x1.0: R2043T) or FFP12 (2.0x2.0x1.0: R2043K), high density mounting of ICs on boards is possible. FEATURES Minimum Timekeeping supply voltage TYP:0.66 to 5.5v (Worst: 1.00V to 5.5v); VDD pin Low power consumption 0.45µA TYP at VDD=3V (1.00µA MAX.) Four signal lines (CE, SCLK, SI, and SO) required for connection to the CPU. Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days, and weeks) (in BCD format) Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month) to the CPU and provided with an interrupt flag and an interrupt halt 2 alarm interrupt circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and minute alarm settings) With Power-on flag to prove that the power supply starts from 0V 32-kHz clock output pin (N-channel open drain output) Supply voltage monitoring circuit with two supply voltage monitoring threshold settings Automatic identification of leap years up to the year 2099 Selectable 12-hour and 24-hour mode settings High precision oscillation adjustment circuit Built-in oscillation stabilization capacitors (CG and CD) Package TSSOP10G (4.0mm x 2.9mm x 1.0mm: R2043T) FFP12 (2.0mm x 2.0mm x 1.0mm: R2043K) CMOS process

DIVIDER CORREC -TION ALARM_W REGISTER (MIN,HOUR, WEEK) ALARM_D REGISTER (MIN,HOUR) TIME COUNTER (SEC,MIN,HOUR,WEEK,DAY,MONTH,YEAR) VDD VOLTAGE DETECT POWER_ON RESET VSS ADDRESS REGISTER ADDRESS DECODER INTERRUPT CONTROL SHIFT REGISTER SELECTION GUIDE Part Number is designated as follows: R2043K-E2 ←Part Number ↑↑ R2043a-bb Code a bb Description Designation of the package. K: FFP12 T: TSSOP10G Designation of the taping type. Only E2 is available.

Item Chip enable Input Serial Clock Input Serial Input Serial Output Interrupt Output OSCIN OSCOUT Oscillation Circuit Input / Output Positive/Negative Power Supply Input Description The CE pin is used for interfacing with the CPU. Should be held high to allow access to the CPU. Incorporates a pull-down resistor. Should be held low or open when the CPU is powered off. Allows a maximum input voltage of 5.5v regardless of supply voltage. The SCLK pin is used to input clock pulses synchronizing the input and output of data to and from the SI and SO pins. Allows a maximum input voltage of 5.5v...

R2043K/T ABSOLUTE MAXIMUM RATINGS Symbol VDD VI VO PD Topt Tstg Item Supply Voltage Input Voltage Output Voltage 1 Output Voltage 2 Power Dissipation Operating Temperature Storage Temperature Pin Name VDD CE, SCLK, SI SO, 32KOUT /INTR Topt = 25°C RECOMMENDED OPERATING CONDITIONS Symbol Vaccess Item Supply Voltage Time keeping Voltage Minimum Time keeping Voltage Oscillation Frequency Pull-up Voltage Pin Name Power supply voltage for interfacing with CPU CGout,CDout=0pF *1), *2) CGout,CDout=0pF *1), *2) kHz 5.5 V VDD +0.3 *1) CGout is connected between OSCIN and VSS, CDout is connected...

R2043K/T DC ELECTRICAL CHARACTERISTICS R2043K/T (Unless otherwise specified: VSS=0V, VDD=3.0V, Topt=-40 to +85°C, Crystal oscillator 32768Hz,CL=7pF,R1=50kΩ) Symbol Item Pin Name Conditions Min. Typ. VIH “H” Input Voltage 0.8x CE, VDD=1.7 to 5.5V VDD SCLK, SI VIL “L” Input Voltage -0.3 IOH IOL1 IOL2 IIL RDNCE IOZ1 IOZ2 “H” Output Current “L” Output Current Input Leakage Current Pull-down Resistance Output Off-state Current Time Keeping Current Supply Voltage VDD 1.45 1.60 1.75 V Monitoring Voltage “H” VDETL Supply Voltage VDD 1.15 1.30 1.45 V Topt=-30 to +70°C Monitoring Voltage “L” *1) For...

R2043K/T AC ELECTRICAL CHARACTERISTICS Unless otherwise specified: VSS=0V,Topt=-40 to +85°C Input and Output Conditions: VIH=0.8×VDD,VIL=0.2×VDD,VOH=0.8×VDD,VOL=0.2×VDD,CL=50pF Symbol Item CondiUnit VDD≥1.7V tions Min. Typ. Max. tCES CE Set-up Time 400 ns tCEH CE Hold Time 400 ns tCR CE Recovery Time 62 µs fSCLK SCLK Clock Frequency 1.0 MHz tCKH SCLK Clock High Time 400 ns tCKL SCLK Clock Low Time 400 ns tCKS SCLK Set-up Time 200 ns tRD Data Output Delay Time 300 ns tRZ Data Output Floating Time 300 ns tCEZ Data Output Delay Time 300 ns After Falling of CE tDS Input Data Set-up Time 200 ns...

(BOTTOM VIEW) 0.17±0.1 0.27±0.15 2.0±0.1 unit: mm

R2043K/T GENERAL DESCRIPTION Interface with CPU The R2043K/T is connected to the CPU by four signal lines CE (Chip Enable), SCLK (Serial Clock), SI (Serial Input), and SO (Serial Output), through which it reads and writes data from and to the CPU. The CPU can be accessed when the CE pin is held high. Access clock pulses have a maximum frequency of 1 MHz allowing high-speed data transfer to the CPU. Clock and Calendar Function The R2043K/T reads and writes time data from and to the CPU in units ranging from seconds to the last two digits of the calendar year. The calendar year will...