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PAN1740 - 1

PAN1740 (r) Bluetooth® Low Energy Module Product Specification Rev. 1.9 Wireless Modules

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PAN1740 - 2

Overview The PAN1740 is a short-range Bluetooth Low Energy (LE) single mode module used for the implementation of Bluetooth functionality into various electronic devices. Characteristics • Peak power consumption 4.9 mA Rx and Tx • Link budget 93 dBm (Rx sensitivity -93, Tx 0 dBm) Operating temperature range -40 °C to +85 °C Features • Pre-programmed BT/MAC address • Includes 16 MHz and 32 768 kHz crystal calibrated up to 1 ppm Single-mode Bluetooth Smart System-on-Chip ® Programmable ARM Cortex -M0 CPU Autonomous Bluetooth LE stand-alone operation Bluetooth 4.2 (LE) embedded GATT profile,...

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PAN1740 - 3

By purchase of any of the products described in this document the customer accepts the document's validity and declares their agreement and understanding of its contents and recommendations. Panasonic reserves the right to make changes as required at any time without notification. Please consult the most recently issued Product Specification before initiating or completing a design. © Panasonic Industrial Devices Europe GmbH 2019. This specification sheet is copyrighted. Reproduction of this document is permissible only if reproduction is without alteration and is accompanied by all...

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PAN1740 - 4

Parasonic PAN1740 Bluetooth Module Product Specification Rev. 1.9 Page 4

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Parasonic PAN1740 Bluetooth Module 1 About This Document 1.1 Purpose and Audience This Product Specification provides details on the functional, operational, and electrical characteristics of the Panasonic PAN1740 module. It is intended for hardware design, application, and Original Equipment Manufacturer (OEM) engineers. The product is referred to as “the PAN 1740” or “the module” within this document. Please refer to the Panasonic website for related documents ^ 7.2.2 Product Information. Product Spec

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PAN1740 - 7

PAN1740 Bluetooth Module 2 Overview 2 Overview The PAN1740 is a short-range Bluetooth LE single mode module used for the implementation of Bluetooth functionality into various electronic devices. The PAN1740 is fully-compliant with the Bluetooth 4.2 standard. It includes dedicated hardware for Link Layer implementation of Bluetooth Smart and interface controllers for enhanced connectivity capabilities. Please refer to the Panasonic website for related documents  7.2.2 Product Information. Further information on the variants and versions  7.1 Ordering Information.

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PAN1740 Bluetooth Module 2 Overview Quad Decoder Chip Antenna DC-DC Conversion ADC/Wake-up Reset Total capacity shall not exceed 2.5 µF. The total inductance shall not exceed 2.5 µH. There is no resistor value in this design.

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PAN1740 - 9

PAN1740 Bluetooth Module 2 Overview System Overview The PAN1740 contains the following internal blocks: ARM Cortex-M0 CPU The Cortex-M0 processor is a 32-bit Reduced Instruction Set Computing (RISC) processor with a “von-Neumann-architecture” (single bus interface). It uses an instruction set called Thumb, which was first supported in the ARM7TDMI processor. Several newer instructions from the ARMv6 architecture and a few instructions from the Thumb-2 technology are also included. Thumb-2 technology extended the previous Thumb instruction set to allow all operations to be carried out in one...

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PAN1740 - 10

Parasonic PAN1740 Bluetooth Module Bluetooth LE core The Bluetooth LE core is a qualified Bluetooth 4.2 baseband controller compatible with Bluetooth Smart specification and it is in charge of packet encoding- decoding and frame scheduling. • Bluetooth Smart Specifications compliant according to the Specification of the Bluetooth 4.2 System, Bluetooth SIG • All device classes are supported (Broadcast, Central, Observer, Peripheral) • All packet types (Advertising/Data/Control) • Encryption (AES/CCM) • Bit stream processing (CRC, Whitening) • FDMA/TDMA/events formatting and synchronization •...

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PAN1740 - 11

PAN1740 Bluetooth Module 2 Overview Memory The following memories are part of the PAN1740’s internal blocks: ROM This is an 84 kB ROM containing the Bluetooth Smart protocol stack as well as the boot code sequence. OTP (One Time Programmable) This is a 32 kB One-Time Programmable memory array, used to store the application code as well as Bluetooth Smart profiles. It also contains the system configuration and calibration data. System SRAM This is a 42 kB system SRAM (Sys-RAM) which is primarily used for mirroring the program code from the OTP when the system wakes/powers up. It also serves...

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PAN1740 - 12

Parasonic PAN1740 Bluetooth Module Power Modes There are four different power modes in the PAN1740: • Active Mode System is active and operates at full speed. • Sleep Mode No power gating has been programmed, the ARM CPU is idle, waiting for an interrupt. PD_SYS is on. PD_PER and PED_RAD depending on the programmed enabled value. • Extended Sleep Mode All power domains are off except for the PD_AON, the programmed PD_RRx and the PD_SR. Since the SysRAM retains its data, no OTP mirroring is required upon waking up the system. • Deep Sleep Mode All power domains are off except for the PD_AON...

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PAN1740 - 13

PAN1740 Bluetooth Module 2 Overview INPUT. Reset signal (active high). General purpose I/O port bit or alternate function nodes. General purpose I/O port bit or alternate function nodes. General purpose I/O port bit or alternate function nodes. 1 UART RX General purpose I/O port bit or alternate function nodes. 1 UART TX Dependent on the software configuration the UART can be set also to any other IO.

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PAN1740 - 14

Parasonic PAN1740 Bluetooth Module 2 Supply voltage on pin VPP during OTP programming is 6.8V+/-0.25V Product Specification Rev. 1.9 Page 14

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Parasonic PAN1740 Bluetooth Module 2.5 Interfaces 2.5.1 UART The UART is compliant to the industry standard “16550” and is used for serial communication with a peripheral, modem (data carrier equipment (DCE)) or data set. Data is written from a master (CPU) over the APB bus to the UART and it is converted to serial form and transmitted to the destination device. Serial data is also received by the UART and stored for the master (CPU) to read back. There is no DMA support on the UART block since it’s contains internal FIFOs. Both UARTs support hardware flow control signals (RTS, CTS, DTR,...

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