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Model M1267B CPU P3e-R

Model M1267B CPU P3e-R
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MAXIFLEX P3e-R CPU M1267B(P3e-R) Redundant Controller DATASHEET FEATURES • Designed for High Availability Applications Support for up to three Remote I/O Bases Support for 1ms input time-tamping (with 32SOE Inputs) Synchronises Program Data with Standby Controller No programming required for remote I/O applications. Integrated 10/100 Ethernet Network Port Automatic I/O module identification and scanning. Programmable in five IEC61131 Programming Languages The MAXIFLEX P3e-R CPU is designed specifically for redundant remote I/O and control applications, where high availability is required in hot standby configurations. A high availability system is constructed by combining two identical P3e-R CPU’s, each with their own Power Supply and Base, to create independent Primary and Secondary Master Controllers. These two Master Controllers are connected to up to three common Remote I/O Bases through an M1593A Remote I/O Network Interface Module, and to the SCADA system to create a hot standby controller configuration with common I/O. The Primary and Secondary Controllers in a hot standby system are synchronised every program scan, so that should the primary Controller fail, the secondary Controller can automatically continue program operation from the last Primary Controller scan. All local data is accessible from a SCADA system through up to 65,500 Data Interchange Registers in a single “Data Interchange Table” for ease of communications. All system configuration data and dynamic data can be read and written through this convenient table interface. The P3e-R can be programmed in one or more of the standard IEC61131-3 programming languages using the Omniflex ISaGraf Programmer’s Workbench, although conventional remote I/O systems can be implemented without the need for any programming. The P3e-R CPU automatically identifies the presence of I/O modules and performs I/O scanning of these modules, making this data available in the Data Interchange Table without needing to write a line of code. Following the ISO OSI 7-layer model, this CPU includes a powerful inter-network routing capability for retrieving data from the corners of the factory in very large, geographically spread-out installations. This capability allows many dissimilar network types to be linked to create a seamless factory intranet, quite often without the need to lay special network cabling. Many other features such as a built-in real-time clock, battery backup for temporary dynamic data. High Availability Solutions for PLC and analogue control applications (including auto-tuning PID) where unexpected system failures can be costly. Integrate third party devices into MAXIFLEX using network interfaces to achieve maximum plant visibility. Remote I/O for SCADA software packages using Ethernet. Use with CONET networking to retrieve data over distances up to 10km. Network linked RTU out-stations with up to 1,000 I/O per out-station. • I/O expansion into existing DCS installations through the network gateways. Distributed Event Handling Systems with Timestamping to 10 milliseconds at source. Copyright Omniflex ♦ Subject to change without notice

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MAXIFLEX P3e-R CPU M1267B(P3e-R) Redundant Controller General Description High Availability System operation A high availability system is constructed by combining two identical P3e-R CPU’s, each with their own Power Supply and Base, to create Primary and Secondary Master Controllers. These two Master Controllers are connected to common Remote I/O Bases, and optionally to a supervisory system. Both Controllers consume the common input data from the remote I/O Bases, but only the active Controller controls the outputs, and communicates with the supervisory computer. The Secondary Controller...

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MAXIFLEX P3e-R CPU M1267B(P3e-R) Redundant Controller like you would subscribe to a magazine through your newsagent. A subscription can be a single register or a block of up to 120 registers which you wish to receive on any change of state and/or at a regular time interval. Each P3e-R CPU can be configured to subscribe to 64 data blocks as receiver, and be requested for up to 16 data blocks as transmitter. AutoScan The P3e-R CPU is equipped with “Autoscan”, a feature that automatically identifies all the I/O Modules and intelligently scans all. Using “Autoscan”, the CPU scans all...

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MAXIFLEX P3e-R CPU M1267B(P3e-R) Redundant Controller MAXIFLEX CPUs and Network Interface Modules (NIM’s) connected to each network. The CONET Router Wizard then calculates the Network Routing Table register entries for each CPU in the system acting as a network router. Enter these values into the CPU DIT to invoke the Network Routing Capability. Global Addressing can then be used on the MAXIFLEX Intranet. Custom Port Protocol Definition. The P3e-R CPU supports custom protocols on the serial port. In order to use this advanced feature of the P3e-R CPU, download the custom protocol driver to...

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MAXIFLEX P3e-R CPU M1267B(P3e-R) Redundant Controller It fully supports six automation languages: the five IEC 1131-3 languages plus Flow Chart. This flexibility enables developers to choose the language that best suits their knowledge, style and application. The Workbench provides tools for editing, debugging, code generation, documentation, library management, archiving, on-line monitoring, off-line simulation and online changes. The Application Workbench uses the IEC61131 industrial standard PLC programming methodology for designing powerful applications without requiring the programmer...

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MAXIFLEX P3e-R CPU M1267B(P3e-R) Redundant Controller LADDER DIAGRAM FLOW CHART The Ladder Diagram (LD) is one of the most familiar methods of representing logical equations and simple actions, particularly in the United States. Contacts represent input arguments and coils represent output results. The Workbench’s Quick LD editor provides the best compromise between high-level graphic capabilities and easy-to-use keyboard driven programming. LD and FBD programming can be mixed in the same chart. STRUCTURED TEXT Structured Text (ST) is a high level structured language with a syntax similar...

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