NPN/PNP resistor-equipped transistors PEMD2_PIMD2_PUM...
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Product data sheet 1. Product profile 1.1 General description NPN/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SMD) plastic packages. Table 1. Product overview Type number Package JEITA PNP/PNP complement NPN/NPN complement Package configuration ultra small and flat lead very small 1.2 Features and benefits 100 mA output current capability Built-in bias resistors Simplifies circuit design Reduces component count Reduces pick and place costs AEC-Q101 qualified 1.3 Applications Low current peripheral driver Control of IC inputs Replaces general-purpose transistors in digital applications 1.4 Quick reference data Table 2. Symbol Quick reference data Parameter Per transistor; for the PNP transistor with negative polarity VCEO collector-emitter voltage open base output current bias resistor 1 (input) bias resistor ratio

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k 2. Pinning information Table 3. Simplified outline Graphic symbol 3. Ordering information Table 4. Ordering information Type number Package Name plastic surface-mounted package; 6 leads plastic surface-mounted package (TSOP6); 6 leads plastic surface-mounted package; 6 leads Marking codes 4. Marking Type number Product data sheet * = placeholder for manufacturing site code All information provided in this document is subject to legal disclaimers.

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Per transistor; for the PNP transistor with negative polarity VCBO collector-base voltage open emitter collector-emitter voltage open base emitter-base voltage open collector input voltage TR1 positive input voltage TR2 positive output current peak collector current total power dissipation Per device total power dissipation junction temperature ambient temperature storage temperature Product data sheet Device...

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k (1) SOT457; FR4 PCB, standard footprint (2) SOT363 and SOT666; FR4 PCB, standard footprint Per device: Power derating curves 6. Thermal characteristics Table 7. Symbol Thermal characteristics Parameter thermal resistance from junction to ambient Product data sheet thermal resistance from junction to ambient Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. All information provided in this document is subject to legal disclaimers.

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k 103 duty cycle = 1 Zth(j-a) (K/W) Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PEMD2 (SOT666); typical values 006aac767 103 duty cycle = 1 Zth(j-a) (K/W) Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PIMD2 (SOT457); typical values Product data sheet All information provided in this document is subject to legal disclaimers.

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k 103 duty cycle = 1 Zth(j-a) (K/W) Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PUMD2 (SOT363); typical values Product data sheet All information provided in this document is subject to legal disclaimers.

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k 7. Characteristics Table 8. Characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter Per transistor; for the PNP transistor with negative polarity ICBO collector-base cut-off current collector-emitter cut-off VCE = 30 V; IB = 0 A current VCE = 30 V; IB = 0 A; Tj = 150 C emitter-base cut-off current collector-emitter saturation voltage off-state input voltage on-state input voltage bias resistor 1 (input) bias resistor ratio collector capacitance transition frequency Product data sheet Characteristics of built-in...

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k TR1 (NPN): DC current gain as a function of collector current; typical values TR1 (NPN): Collector-emitter saturation voltage as a function of collector current; typical values 006aac797 TR1 (NPN): On-state input voltage as a function of collector current; typical values Product data sheet TR1 (NPN): Off-state input voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers.

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k TR1 (NPN): Collector capacitance as a function of collector-base voltage; typical values Fig 10. TR1 (NPN): Transition frequency as a function of collector current; typical values of built-in transistor 006aac801 Fig 11. TR2 (PNP): DC current gain as a function of collector current; typical values Product data sheet Fig 12. TR2 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers.

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k Fig 13. TR2 (PNP): On-state input voltage as a function of collector current; typical values 006aac804 Fig 14. TR2 (PNP): Off-state input voltage as a function of collector current; typical values 006aac763 Product data sheet Fig 15. TR2 (PNP): Collector capacitance as a function of collector-base voltage; typical values Fig 16. TR2 (PNP): Transition frequency as a function of collector current; typical values of built-in transistor All information provided in this document is subject to legal disclaimers.

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. Product data sheet All information provided in this document is subject to legal disclaimers.

NPN/PNP resistor-equipped transistors; R1 = 22 k, R2 = 22 k solder lands solder resist solder paste occupied area 0.7 (6×) Fig 20. Reflow soldering footprint PIMD2 (SOT457) 5.3 solder resist occupied area 1.475 Dimensions in mm preferred transport direction during soldering 1.45 (6×) 2.85 Fig 21. Wave soldering footprint PIMD2 (SOT457) Product data sheet All information provided in this document is subject to legal disclaimers.