ICM7555 General purpose CMOS timer
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ICM7555 General purpose CMOS timer Rev. 02 — 3 August 2009 Product data sheet 1. General description The ICM7555 is a CMOS timer providing signicantly improved performance over the standard NE/SE555 timer, while at the same time being a direct replacement for those devices in most applications. Improved parameters include low supply current, wide operating supply voltage range, low THRESHOLD, TRIGGER, and RESET currents, no crowbarring of the supply current during output transitions, higher frequency performance and no requirement to decouple CONTROL_VOLTAGE for stable operation. The ICM7555 is a stable controller capable of producing accurate time delays or frequencies. In the one-shot mode, the pulse width of each circuit is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free-running frequency and the duty cycle are both accurately controlled by two external resistors and one capacitor. Unlike the NE/SE555 device, the CONTROL_VOLTAGE terminal need not be decoupled with a capacitor. The TRIGGER and RESET inputs are active LOW. The output inverter can source or sink currents large enough to drive TTL loads or provide minimal offsets to drive CMOS loads. 2. Features I I I I I I I I I I I I I Exact equivalent in most applications for NE/SE555 Low supply current: 80 µA (typical) Extremely low trigger, threshold, and reset currents: 20 pA (typical) High-speed operation: 500 kHz guaranteed Wide operating supply voltage range guaranteed 3 V to 16 V over full automotive temperatures Normal reset function; no crowbarring of supply during output transition Can be used with higher-impedance timing elements than the NE/SE555 for longer time constants Timing from microseconds through hours Operates in both astable and monostable modes Adjustable duty cycle High output source/sink driver can drive TTL/CMOS Typical temperature stability of 0.005 % / °C at 25 °C Rail-to-rail outputs

ICM7555 NXP Semiconductors General purpose CMOS timer 3. Applications I I I I I I I Precision timing Pulse generation Sequential timing Time delay generation Pulse width modulation Pulse position modulation Missing pulse detector 4. Ordering information Table 1. Ordering information Type number Temperature range Package Name ICM7555CD ICM7555IN SOT96-1 plastic dual in-line package; 8 leads (300 mil) SOT97-1 Tamb = −40 °C to +85 °C Tamb = 0 °C to +70 °C plastic small outline package; 8 leads; body width 3.9 mm DIP8 ICM7555ID ICM7555CN Version SO8 Tamb = 0 °C to +70 °C Description Tamb = −40...

ICM7555 NXP Semiconductors General purpose CMOS timer 6. Pinning information 6.1 Pinning GND 1 8 TRIGGER 2 ICM7555CD 7 DISCHARGE OUTPUT 3 ICM7555ID 6 THRESHOLD RESET 4 5 CONTROL_VOLTAGE VDD GND 1 8 TRIGGER 2 ICM7555CN 7 DISCHARGE OUTPUT 3 ICM7555IN 6 THRESHOLD RESET 4 5 CONTROL_VOLTAGE 002aae400 Fig 2. VDD 002aae401 Pin conguration for SO8 Fig 3. Pin conguration for DIP8 6.2 Pin description Table 2. Pin description Symbol Pin Description GND 1 supply ground TRIGGER 2 start timer input; (active LOW) OUTPUT 3 timer logic level output RESET 4 timer inhibit input; (active LOW) CONTROL_VOLTAGE 5...

ICM7555 NXP Semiconductors General purpose CMOS timer 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDD Conditions Min Max supply voltage Unit 18 V V −0.3 VDD + 0.3 V −0.3 VDD + 0.3 V - 100 mA DIP8 package - 1160 mW SO8 package - 780 mW −65 +150 °C - 300 °C TRIGGER output current power dissipation V VDD + 0.3 RESET IO VDD + 0.3 −0.3 THRESHOLD P −0.3 CONTROL_VOLTAGE input voltage VI [1] Tstg solder point temperature [2][3] storage temperature Tsp Tamb = 25 °C (still air) soldering 60 s [1] Due to the SCR...

ICM7555 NXP Semiconductors General purpose CMOS timer Table 5. Characteristics …continued Tamb = 25 °C unless otherwise specied. Sym bol Parameter Conditions II input current Min Typ Max Unit TRIGGER VDD = Vtrig = Vmax - 50 - pA VDD = Vtrig = 5 V - 10 - pA VDD = Vtrig = Vmin - 1 - pA THRESHOLD VDD = Vth = Vmax - 50 - pA VDD = Vth = 5 V - 10 - pA VDD = Vth = Vmin - 1 - pA RESET VDD = Vrst = Vmax - 100 - pA VDD = Vrst = 5 V - 20 - pA VDD = Vrst = Vmin - 2 - pA VOL LOW-level output voltage VDD = Vmax; Isink = 3.2 mA - 0.1 0.4 V VDD = 5 V; Isink = 3.2 mA - 0.2 0.4 V VOH HIGH-level output...

ICM7555 NXP Semiconductors General purpose CMOS timer 10. Typical performance curves 002aae404 250 IDD (µA) 200 Tamb = −55 °C +25 °C +125 °C 150 100 50 0 0 5 10 15 20 VDD (V) Fig 4. Supply current versus supply voltage 002aae405 102 Io(source) (mA) VDD = 18 V 5V 2V 10 1 10−1 10−1 1 10 VDD − VO (V) 102 Tamb = +25 °C. Fig 5. High output voltage drop versus output source current 002aae406 102 IDIS (mA) 10 1 VDD = 18 V 5V 2V 10−1 10−1 1 10 VDIS (V) Tamb = +25 °C. Fig 6. Discharge low output voltage versus discharge sink current ICM7555_2 Product data sheet © NXP B.V. 2009. All rights reserved....

ICM7555 NXP Semiconductors General purpose CMOS timer 002aae407 102 Io(sink) (mA) VDD = 18 V 5V 2V 10 1 10−1 10−1 1 10 VOL (V) a. Tamb = +125 °C. 002aae408 102 Io(sink) (mA) VDD = 18 V 5V 2V 10 1 10−1 10−1 1 10 VOL (V) b. Tamb = +25 °C. 002aae409 102 Io(sink) (mA) VDD = 18 V 5V 2V 10 1 10−1 10−1 1 10 VOL (V) c. Tamb = −55 °C. Fig 7. Low output voltage versus output sink current ICM7555_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 3 August 2009 7 of 22

ICM7555 NXP Semiconductors General purpose CMOS timer 002aae410 500 TRIGGER pulse width (ns) VDD = 18 V 5V 2V 400 300 200 100 0 0 Fig 8. 10 20 30 40 lowest voltage level of TRIGGER pulse (% VDD) Minimum pulse width for triggering 002aae411 1000 tPD (ns) Tamb = −55 °C +25 °C +125 °C 750 500 250 0 0 Fig 9. 10 20 Propagation delay versus voltage level of TRIGGER pulse (VDD = 5 V) ICM7555_2 Product data sheet 30 40 lowest voltage level of TRIGGER pulse (% VDD) © NXP B.V. 2009. All rights reserved. Rev. 02 — 3 August 2009 8 of 22