CLRC663 Contactless reader IC Rev. 3.3 — 3 April 2012 171133 Product data sheet COMPANY PUBLIC 1. Introduction This document describes the functionality and electrical specifications of the contactless reader/writer IC CLRC663. 2. General description The CLRC663 is a highly integrated transceiver IC for contactless communication at 13.56 MHz. The CLRC663 transceiver IC supports the following operating modes • Read/write mode supporting ISO/IEC 14443A/MIFARE • Read/write mode supporting ISO/IEC 14443B • Read/write mode supporting JIS X 6319-4 (comparable with FeliCa1 (see Section 21.5) scheme) • • • • Passive initiator mode according to ISO/IEC 18092 Read/write mode supporting ISO/IEC 15693 Read/write mode supporting ICODE EPC UID/ EPC OTP Read/write mode supporting ISO/IEC 18000-3 mode 3/ EPC Class-1 HF The CLRC663’s internal transmitter is able to drive a reader/writer antenna designed to communicate with ISO/IEC 14443A/MIFARE cards and transponders without additional active circuitry. The digital module manages the complete ISO/IEC 14443A framing and error detection functionality (parity and CRC). The CLRC663 supports MIFARE Classic 1K, MIFARE Classic 4K, MIFARE Ultralight, MIFARE Ultralight C, MIFARE PLUS and MIFARE DESFire products. The CLRC663 supports MIFARE higher transfer speeds of up to 848 kbit/s in both directions. The CLRC663 supports layer 2 and 3 of the ISO/IEC 14443B reader/writer communication scheme except anticollision. The anticollision needs to be implemented in the firmware of the host controller as well as in the upper layers. The CLRC663 is able to demodulate and decode FeliCa coded signals.The FeliCa receiver part provides the demodulation and decoding circuitry for FeliCa coded signals. The CLRC663 handles the FeliCa framing and error detection such as CRC. The CLRC663 supports FeliCa higher transfer speeds of up to 424 kbit/s in both directions. 1. In the following the word FeliCa is used for JIS X 6319-4

CLRC663 NXP Semiconductors Contactless reader IC The CLRC663 is supporting the P2P passive initiator mode in accordance with ISO/IEC 18092. The CLRC663 supports the vicinity protocol according to ISO/IEC15693, EPC UID and ISO/IEC 18000-3 mode 3/ EPC Class-1 HF. The following host interfaces are supported: • Serial Peripheral Interface (SPI) • Serial UART (similar to RS232 with voltage levels dependent on pin voltage supply) • I2C-bus interface (two versions are implemented: I2C and I2CL) The CLRC663 supports the connection of a secure access module (SAM). A dedicated separate I2C interface is...

CLRC663 NXP Semiconductors Contactless reader IC 4. Quick reference data Table 1. Quick reference data Symbol Parameter VDD Conditions supply voltage TVDD supply voltage VDD(PVDD) PVDD supply voltage Ipd power-down current IDD [1] supply current Typ Max Unit 3 VDD(TVDD) Min 5 5.5 V IDD(TVDD) ambient temperature Tstg storage temperature no supply voltage applied 5.5 V 5.5 V - 8 40 nA 17 20 mA - 100 200 mA 25 [3][4] TVDD supply current Tamb [2] 5 5 - PDOWN pin pulled HIGH 3 3 +25 +85 C 40 +25 +100 C [1] VDD(PVDD) must always be the same or lower voltage than VDD. [2] Ipd is the sum of all supply...

CLRC663 NXP Semiconductors Contactless reader IC 6. Block diagram The analog interface handles the modulation and demodulation of the antenna signals for the contactless interface. The contactless UART manages the protocol dependency of the contactless interface settings managed by the host. The FIFO buffer ensures fast and convenient data transfer between host and the contactless UART. The register bank contains the settings for the analog and digital functionality. REGISTER BANK ANTENNA ANALOG INTERFACE CONTACTLESS UART FIFO BUFFER SERIAL UART SPI I2C-BUS HOST 001aaj627 Fig 1. Simplified block...

CLRC663 NXP Semiconductors Contactless reader IC 7.1 Pin description Table 3. Pin description Pin Symbol Type Description 1 TDO O test data output for boundary scan interface 2 TDI I test data input boundary scan interface 3 TMS I test mode select boundary scan interface 4 TCK I test clock boundary scan interface 5 SIGIN I Contactless communication interface output. 6 SIGOUT O Contactless communication interface input. 7 DVDD PWR digital power supply buffer [1] 8 VDD PWR power supply 9 AVDD PWR analog power supply buffer [1] 10 AUX1 O auxiliary outputs: Pin is used for analog test signal 11 AUX2...

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CLRC663 NXP Semiconductors Contactless reader IC 8.1 Interrupt controller The interrupt controller handles the enabling/disabling of interrupt requests. All of the interrupts can be configured by firmware. Additionally, the firmware has possibilities to trigger interrupts or clear pending interrupt requests. Two 8-bit interrupt registers IRQ0 and IRQ1 are implemented, accompanied by two 8-bit interrupt enable registers IRQ0En and IRQ1En. A dedicated functionality of bit 7 to set and clear bits 0 to 6 in this interrupt controller registers is implemented. The CLRC663 indicates certain events by...

CLRC663 NXP Semiconductors Contactless reader IC Table 4. Interrupt sources Interrupt bit Interrupt source Is set automatically, when Timer0Irq Timer Unit the timer register T0 CounterVal underflows Timer1Irq Timer Unit the timer register T1 CounterVal underflows Timer2Irq Timer Unit the timer register T2 CounterVal underflows Timer3Irq Timer Unit the timer register T3 CounterVal underflows TxIrq a received data stream ends Command Register a command execution finishes HiAlertIrq FIFO-buffer pointer the FIFO data number has reached the top level as configured by the bit WaterLevel LoAlertIrq...