BT148-400R Logic level thyristor
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BT148-400R Logic level thyristor - 1

logic level Product specification

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Product specification GENERAL DESCRIPTION Glass passivateci, sensitive gate thyristors in a plastic envelope, intended for use in general purpose switching and phase control applications. These devices are intended to be interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger circuits. QUICK REFERENCE DATA LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (EC 134) Repetitive peak off-state Average on-state current Non-repetitive peak on-state current Repetitive rate of rise of on-state current after Peak gate current...

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Product specification logic level THERMAL RESISTANCES STATIC CHARACTERISTICS Tj = 25 °C unless otherwise stated DYNAMIC CHARACTERISTICS Tj = 25 °C unless otherwise stated

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Product specification logic level Fig. 1. Maximum on-state dissipation, Ptot, versus average on-state current, lT(AV), where _a = form factor = lT(RMS)' lTm._ Number of half cycles at 50Hz Fig.4. Maximum permissible non-repetitive peak on-state current lTSM, versus number of cycles, for Fig.2. Maximum permissible non-repetitive peak on-state current lTSM, versus pulse width tp, for Fig.3. Maximum permissible rms current lT(RMS) versus mounting base temperature Tmb.

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BT148-400R Logic level thyristor - 5

1;3 Semiconductors Product specification Thyristors logic level 3 BT148 series IGT(Tj) IGT(25 C) BT148 IT / A 12 BT148 Tj = 125 C Tj = 25 C 10 2.5 typ Vo = 1.26 V Rs = 0.099 ohms max 8 2 6 1.5 1 4 0.5 2 0 -50 0 0 50 Tj / C 100 150 Fig.7. Normalised gate trigger current IGT(Tj)/ IGT(25˚C), versus junction temperature Tj. 3 IL(Tj) IL(25 C) 0 0.5 1 1.5 VT / V 2 2.5 3 Fig.10. Typical and maximum on-state characteristic. 10 BT145 BT148 Zth j-mb (K/W) 2.5 1 2 1.5 0.1 1 P D tp 0.5 t 0 -50 0 50 Tj / C 100 0.01 10us 150 IH(Tj) IH(25 C) 1ms 10ms 0.1s 1s 10s tp / s Fig.11. Transient thermal impedance...

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Product specification logic level MECHANICAL DATA 1) Lead dimensions within this zone uncontrolled. Fig. 13. SOT82; pin 2 connected to mounting base. 1. Refer to mounting instructions for SOT82 envelopes.

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NXP Semiconductors Legal information DATA SHEET STATUS DOCUMENT STATUS(1) PRODUCT STATUS(2) DEFINITION Objective data sheet Development This document contains data from the objective specification for product development. Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification. Notes 1. Please consult the most recently issued document before initiating or completing a design. 2. The product status of device(s) described in this document may have changed since this...

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NXP Semiconductors Legal information NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this...

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