Catalog excerpts
74AHC123A; 74AHCT123A Dual retriggerable monostable multivibrator with reset Rev. 4 — 8 November 2011 Product data sheet 1. General description The 74AHC123A; 74AHCT123A are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC123A; 74AHCT123A are dual retriggerable monostable multivibrators with output pulse width control by three methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). The external resistor and capacitor are normally connected as shown in Figure 11. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering. An internal connection from nRD to the input gate makes it possible to trigger the circuit by a positive-going signal at input nRD as shown in Table 3. Figure 8 and Figure 9 illustrate pulse control by retriggering and early reset. The basic output pulse width is essentially determined by the value of the external timing components REXT and CEXT. When CEXT 10 nF, the typical output pulse width is defined as: tW = REXT CEXT where tW = pulse width in ns; REXT = external resistor in k; CEXT = external capacitor in pF. Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall times. 2. Features and benefits All inputs have a Schmitt-trigger action Inputs accept voltages higher than VCC DC triggered from active HIGH or active LOW inputs Retriggerable for very long pulses up to 100 % duty factor Direct reset terminates output pulse For 74AHC123A only: operates with CMOS input levels For 74AHCT123A only: operates with TTL input levels ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C
Open the catalog to page 174AHC123A; 74AHCT123A NXP Semiconductors Dual retriggerable monostable multivibrator with reset 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74AHC123AD Name Description Version 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm 74AHCT123AD 74AHC123APW...
Open the catalog to page 274AHC123A; 74AHCT123A NXP Semiconductors Dual retriggerable monostable multivibrator with reset 14 15 S 1A 1B 1RD Q 1 13 4 Q 2 2RD 1Q 1Q RD 3 6 S 2B 1REXT/CEXT T 7 2A 1CEXT 5 Q 9 2CEXT 2REXT/CEXT 2Q T Q 10 12 2Q RD 11 aaa-000650 Fig 3. Functional diagram 74AHC_AHCT123A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 8 November 2011 © NXP B.V. 2011. All rights reserved. 3 of 22
Open the catalog to page 374AHC123A; 74AHCT123A NXP Semiconductors Dual retriggerable monostable multivibrator with reset nREXT/CEXT VCC Q RD R Q R CL VCC CL VCC R CL A B CL CL 001aae524 R For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND). Fig 4. Functional diagram 74AHC_AHCT123A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 8 November 2011 © NXP B.V. 2011. All rights reserved. 4 of 22
Open the catalog to page 474AHC123A; 74AHCT123A NXP Semiconductors Dual retriggerable monostable multivibrator with reset 5. Pinning information 5.1 Pinning 1 1A terminal 1 index area 74AHC123A 74AHCT123A 16 VCC 74AHC123A 74AHCT123A 1B 2CEXT 6 7 10 2B GND 8 7 11 2RD 2REXT/CEXT 6 9 GND(1) 2A 11 2RD 10 2B 9 12 2Q 8 5 2A 2Q 12 2Q 13 1Q GND 4 2Q 14 1CEXT 1Q 13 1Q 5 2CEXT 3 14 1CEXT 4 15 1REXT/CEXT 1RD 3 16 VCC 2 1Q 2REXT/CEXT 1 1B 15 1REXT/CEXT 1RD 1A 2 001aah067 Transparent top view 001aah068 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input....
Open the catalog to page 574AHC123A; 74AHCT123A NXP Semiconductors Dual retriggerable monostable multivibrator with reset 6. Functional description Function table[1] Table 3. Input Output nRD nA nB nQ nQ L X X L H H[2] H[2] X H X L[2] X X L L[2] H L H H L H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; = LOW-to-HIGH transition; = HIGH-to-LOW transition; = one HIGH level output pulse; = one LOW level output pulse. [2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed. 7. Limiting values Table 4. Limiting values In accordance...
Open the catalog to page 674AHC123A; 74AHCT123A NXP Semiconductors Dual retriggerable monostable multivibrator with reset 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC123A Min 74AHCT123A Typ Max Min Unit Typ Max VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 3.3 V 0.3 V - - 100 - - - ns/V VCC = 5.0 V 0.5 V - - 20 - - 20 ns/V 9. Static...
Open the catalog to page 774AHC123A; 74AHCT123A NXP Semiconductors Dual retriggerable monostable multivibrator with reset Table 6. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Min Max Min Max - - 4.0 - 40 - 80 A - 160 250 - 280 - 280 A VCC = 4.5 V - 380 500 - 650 - 650 A VCC = 5.5 V supply current Max VCC = 3.0 V ICC Typ - 560 750 - 975 - 975 A VI = VCC or GND; IO = 0 A; VCC = 5.5 V [1] active state (per circuit); VI = VCC or GND CI input capacitance - 5.0 10 - 10 - 10 pF CO output capacitance - 4.0 - - - - -...
Open the catalog to page 8All NXP Semiconductors catalogs and technical brochures
-
TEF7006 & TEF7007
4 Pages
-
TEF668X
8 Pages
-
TDA8034HN
32 Pages
-
MSC8256
70 Pages
-
SAC57D54H
77 Pages
-
WB10-AT i.MX 8M SOM Datasheet
24 Pages
-
OL2385
85 Pages
-
MAC57D5xx
2 Pages
-
NXP Product Selector
1 Pages
-
BTA2008-600D 3Q Hi-Com Triac
12 Pages
-
KMZ41 Magnetic field sensor
10 Pages
-
BGA2001 Silicon MMIC amplifie
12 Pages
-
LH75401/LH75411 System-on-Chip
63 Pages
-
CLRC66301HN Contactless reader IC
132 Pages
-
UDA1342TS Audio CODEC
45 Pages