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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer

LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer
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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 1

■ Bidirectional Synchronous Flyback Balancing of Up to 6 Li-Ion or LiFeP04 Cells in Series ■ Up to 10A Balancing Current (Set by External ■ Bidirectional Architecture Minimizes Balancing Time and Power Dissipation ■ Up to 92% Charge Transfer Efficiency ■ Stackable Architecture Enables >1000V Systems ■ Uses Simple 2-Winding Transformers ■ 1 MHz Daisy-Chainable Serial Interface with 4-Bit CRC Packet Error Checking ■ High Noise Margin Serial Communication ■ Numerous Fault Protection Features ■ 48-Lead Exposed Pad QFN and LQFP Packages ■ Electric Vehicles/Plug-in HEVs ■ High Power UPS/Grid Energy Storage Systems ■ General Purpose Multicell Battery Stacks XT, l_I LTC, LTM, Linear Technology and the Linear logo are registered trademarks and isoSP is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Electrical Specifications Subject to Change High Efficiency Bidirectional Multicell Battery Balancer transformer-based bidirectional active balancing of multi- cell battery stacks. All associated gate drive circuitry precision current sensing, fault detection circuitry and a robust serial interface with built-in watchdog timer are Each LTC3300-1 can balance up to 6 series-connected bat- tery cells with an input common mode voltage up to 36V Charge from any selected cell can be transferred at high efficiency to or from 12 or more adjacent cells. A unique level-shifting SPI-compatible serial interface enables multiple LTC3300-1 devices to be connected in series, without opto-couplers or isolators, allowing for balancing of every cell in a long string of series-connected batteries. When multiple LTC3300-1 devices are connected in series they can operate simultaneously, permitting all cells in the stack to be balanced concurrently and independently. Fault protection features include readback capability, cy- clic redundancy check (CRC) error detection, maximum on-time volt-second clamps, and overvoltage shutoffs. TVPicni nppucnTion High Efficiency Bidirectional Balancing NEXT CELL ABOVE NEXT CELL BELOW Balancer Efficiency NUMBER OF CELLS (SECONDARY SIDE) TECHNOLOGY For more information www.linear.com/3300-1

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 3

ORD€R inFORfTMTIOn Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ €l€CTRICm CHRRRCTCRISTICS The • denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA =...

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 4

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 5

The • denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) BOOSP = 25.2V, C6 = 21.6V, C5 = 18V, C4 = 14.4V, C3 = 10.8V, C2 = 7.2V, C1 = 3.6V, V~ = OV, unless otherwise noted. Voltage Mode Timing Specifications Current Mode Timing Specifications Voltage Mode Digital I/O Specifications TECHNOLOGY For more information www.linear.com/3300-1

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 6

The • denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) BOOSP = 25.2V, C6 = 21.6V, C5 = 18V, C4 = 14.4V, C3 = 10.8V, C2 = 7.2V, C1 = 3.6V, V~ = OV, unless otherwise noted. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device Note 2: The LTC3300-1 is tested under pulsed load conditions such that Tj« TA. The LTC3300I-1 is guaranteed over the -40°C to 125°C...

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 7

Tfl = 25°C unless otherwise specified. C6 Supply Current When Not Maximum Cell Voltage to Allow VREG POR Voltage and Minimum Secondary Gate Drive vs Supply Current When Balancing MATCH CURVE WITH TABLE ENTRY VREG Load Regulation VREG Short-Circuit Current Limit Minimum Cell Voltage Required for Primary Gate Drive vs VREG Voltage vs Temperature VRTONP, VRTONS VS Temperature

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 8

Tfl = 25°C unless otherwise specified. VRTONP- VRTONS RTONP, RTONS RESISTANCE (kfi) Peak Current Sense Threshold Secondary Winding Switch Maximum On-Time vs Temperature Zero Current Sense Threshold Maximum On-Time Primary Winding Switch Maximum Watchdog Timer Timeout Period For more information www.linear.com/3300-1 -^^f TECHNOLOGY

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 9

TVPicni p€RFORmnnc€ CHARACTERISTICS Ta = 25°C unless otherwise specified. CSBO Digital Output Current High CSBO Digital Output Current Low Balancer Efficiency Balance Current vs Cell Voltage Typical Charge Waveforms Typical Discharge Waveforms Protection for Broken Connection to Cell While Charging Protection for Broken Connection to Secondary Stack While Changing Balancer Direction STACK VOLTAGE TECHNOLOGY For more information www.linear.com/3300-1

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 10

LTC3300-1 PIN FUNCTIONS Note: The convention adopted in this data sheet is to refer to the transformer winding paralleling an individual battery cell as the primary and the transformer winding paralleling multiple series-stacked cells as the secondary, regardless of the direction of energy transfer. CSBI (Pin 16): Chip Select (Active Low) Input. The CSBI pin interfaces to a rail-to-rail output logic gate if VMODE is tied to VREG. CSBI must be driven by the CSBO pin of another LTC3300-1 if VMODE is tied to V–. See Serial Port in the Applications Information section. G6S, G5S, G4S, G3S, G2S,...

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LTC3300-1 - High Efficiency Bidirectional Multicell Battery Balancer - 11

LTC3300-1 PIN FUNCTIONS G1P G2P G3P G4P G5P G6P (Pins 23, 26, 29, 32, 35, , , , , , 38): G1P through G6P are gate driver outputs for driving external NMOS transistors connected in series with the primary windings of transformers connected in parallel with battery cells 1 through 6. SCKO (Pin 44): Serial Clock Output. SCKO is a buffered and one-shotted version of the serial clock input, SCKI, when CSBI is low. SCKO drives the next IC higher in the daisy chain. See Serial Port in the Applications Information section. C1, C2, C3, C4, C5, C6 (Pins 24, 27, 30, 33, 36, 39): C1 through C6 connect...

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