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AD7383

AD7383
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ANALOG DEVICES Dual, Simultaneous Sampling, 16-Bit/14-Bit, 4 MSPS, SAR ADCs, Pseudo Differential Input Data Sheet AD7383/AD7384 FEATURES Dual 16-bit/14-bit ADC family Dual simultaneous sampling Pseudo differential analog inputs 4 MSPS throughput conversion rate SNR (typical) 87.5 dB, Vref = 3.3 V external for 16-bit AD7383 83.5 dB, Vref = 3.3 V external for 14-bit AD7384 93.4 dB with RES = 1 and OSR = 8 On-chip oversampling function Resolution boost function INL error (maximum) 2.5 LSBs for 16-bit AD7383 1.0 LSB for 14-bit AD7384 2.5 V internal reference High speed serial interface -40°C to +125°C operation 16-lead LFCSP, 3 mm x 3 mm Alert function APPLICATIONS Motor control position feedback Motor control current sense Sonar Power quality Data acquisition systems Erbium doped fiber amplifier (EDFA) applications I and Q demodulation FUNCTIONAL BLOCK DIAGRAM VCC VLOGIC The conversion process and data acquisition use standard control inputs that allow simple interfacing to microprocessors or digital signal processors (DSPs). The devices are compatible with 1.8 V, 2.5 V, and 3.3 V interfaces, using a separate logic supply. The AD7383 and the AD7384 are available in a 16-lead lead frame chip scale package (LFCSP) with operation specified from -40°C to +125°C. Multifunction pin names may be referenced by their relevant function only. PRODUCT HIGHLIGHTS GENERAL DESCRIPTION The 16-bit AD7383 and the 14-bit AD7384 are a pin-compatible family of dual simultaneous sampling, high speed, low power, successive approximation register (SAR), analog-to-digital converters (ADCs) that operate from a 3.0 V to 3.6 V power supply and feature throughput rates up to 4 MSPS. The analog input type is pseudo differential and is sampled and converted on the falling edge of CS. Integrated on-chip oversampling blocks improve dynamic range and reduce noise at lower bandwidths. A buffered internal 2.5 V reference is included. Alternatively, an external reference up to 3.3 V can be used. 1. Dual simultaneous sampling and conversion with two complete ADC functions. 2. Pin-compatible product family. 3. High 4 MSPS throughput rate. 4. Space saving 3 mm x 3 mm LFCSP. 5. Integrated oversampling block to increase dynamic range, reduce noise, and reduce SCLK speed requirements. 6. Pseudo differential analog inputs. 7. Small sampling capacitor reduces amplifier drive burden. Table 1. Related Devices in the Family Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks arethe property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2020 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

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Data Sheet REVISION HISTORY 7/2020—Revision 0: Initial Version

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AD7383/AD7384 SPECIFICATIONS Vcc = 3.0 V to 3.6 V, Vlogic = 1.65 V to 3.6 V, reference voltage (Vref) = 2.5 V internal, sampling frequency ^sample) = 4 MSPS, Ta = -40°C to +125°C, and no oversampling enabled, unless otherwise noted. Parameter RESOLUTION-THROUGHPUT Conversion Rate DC ACCURACY No Missing Codes Differential Nonlinearity (DNL) Error Integral Nonlinearity (INL) Error Gain Error Gain Error Temperature Drift Gain Error Match Offset Error Offset Temperature Drift Offset Error Match AC ACCURACY Dynamic Range Oversampled Dynamic Range Signal-to-Noise Ratio (SNR) Spurious-Free Dynamic...

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Data Sheet Vcc = 3.0 V to 3.6 V, Vlogic = 1.65 V to 3.6 V, Vref = 2.5 V internal, fsAMPLE = 4 MSPS, Ta = -40°C to +125°C, and no oversampling enabled, unless otherwise noted. Parameter RESOLUTION-THROUGHPUT Conversion Rate DC ACCURACY No Missing Codes DNL Error INL Error Gain Error Gain Error Temperature Drift Gain Error Match Offset Error Offset Temperature Drift Offset Error Match_ Dynamic Range Oversampled Dynamic Range SNR Test Conditions/Comments Tmin to Tmax Tmin to Tmax Tmin to Tmax Tmin to Tmax fiN = 1 kHz OSR = 4 VREF = 3.3 V external OS_MODE = 1, OSR = 8, RES = 1 fiN = 100 kHz...

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Data Sheet

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TIMING SPECIFICATIONS Vcc = 3.0 V to 3.6 V, Vlogic = 1.65 V to 3.6 V, Vref = 2.5 V internal, and Ta = -40°C to +125°C, unless otherwise noted. See Figure 2 to Figure 6, Figure 36, and Figure 38 for the timing diagrams. Table 5. Parameter tcYC tsCLKED tsCLK tsCLKH tsCLKL tCSH tQUIET tsDOEN tsDOH tsDOS tsDOT tsDIS tSDIH tsCLKCS tCONVERT tACQUIRE tRESET tREGWRITE tsTARTUP Description Time between conversions CS falling edge to first SCLK falling edge SCLK period SCLK high time SCLK low time CS pulse width Interface quiet time prior to conversion CS low to SDOA and SDOB/ALERT enabled tcONVERT0...

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Timing Diagrams SCLKED it: -^U _tSDOT < DBi^(~DB^ DB13 X DB12 DB11 X DBio )( DB9 DB^ DB7 X DB6 X DB5 X DB4 X DB3 X DB^f DB1 X DBq )- Figure 2. Serial Interface Timing Diagram Figure 3. Internal Conversion Acquire Timing TIME TO ACCURATE CONVERSION Figure 4. Power-Up Time to Conversion Figure 5. Power-Up Time to Register Read Write Access CONVERSION ACQUIRE CONVERSION ACQUIRE CONVERSION ACQUIRE CONVERSION ACQUIRE Figure 6. Conversion Timing During Normal Average Oversampling Mode

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Data Sheet AD7383/AD7384ABSOLUTE MAXIMUM RATINGS Table 6. Parameter Vcc to GND Vlogic to GND Input Voltage Analog to GND -0.3 V to Vref + 0.3 V and less than Vcc + 0.3 V and less than +4 V THERMAL RESISTANCE Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. 0ja is the natural convection, junction to ambient thermal resistance measured in a one cubic foot sealed enclosure. 0jc is the junction to case thermal resistance. Digital Output Voltage to GND Table 7. Thermal Resistance ESD...

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