
Catalog excerpts

Data Sheet Physical Address Cycle Type B4623B bus decode shown in listing Burst Type = Interleave Accelerate your time to insight using the B4623B bus decoder for LPDDR, LPDDR2, or LPDDR3 debug and validation. The B4623B provides complete proto- col decode of memory transactions using an Agilent logic analyzer as the analy- sis execution engine. The B4623B protocol-decode software translates acquired signals into easily understood bus transactions showing associated data bursts, for all LPDDR, LPDDR2, or LPDDR3 data rates. Valid Read and Write commands are decoded to include Row and Column Addresses and the complete data burst associated with the command. The B4623B bus decode software anticipates key system attribute inputs (Burst length, CAS Latency and CAS Write Latency, Chip Selects) from default LPDDR, LPDDR2, or LPDDR3 probing configurations and/or DDR Setup Assistant tool to accelerate decode of LPDDR, LPDDR2, or LPDDR3 Anticipate_Accelerate_Achieve Agilent Technologies
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Key features and benefits: • Decodes LPDDR, LPDDR2, or LPDDR3 acquired traces on Agilent logic analyzer or off-line • Displays commands, protocol transaction type, physical/row/column/bank addresses, and data in the listing viewer • Data bursts are associated and displayed with appropriate Read and Write transactions • Data is displayed at any level of detail from protocol to binary • Anticipates key system attribute inputs from default probing configurations and/or DDR Setup Assistant tool • Allows user input to customize decoder properties After installing the logic analyzer software and...
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Chip Selects Memory Configuration Memory Width Column Bits Burst Type Physical Address Construction @ | BA | Row Address | Column Address ) I Row Address I BA I Column Address User supplied .NET assembly C:\Program Files\Agilent Technolo Browse.. ■ Physical Address Summary The B4623B bus decoder for LPDDR, LPDDR2, and LPDDR3 debug and validation operates with multiple Logic Analyzers from Agilent Technologies. Logic ana- lyzer selection criteria includes: logic analyzer specifications and characteristics, maximum DDR technology data rate, and minimum data valid windows of the data eyes at...
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Refer to www.agilent.com/find/logic for a comparison view of Agilent logic analyzer modules. Refer to your logic analyzer module data sheet or specific LPDDR, LPDDR2, and LPDDR3 probing solution for logic analyzer module configurations. Default configurations for B4623B bus decoder for LPDDR, LPDDR2, and LPDDR3 debug and validation are loaded for recommended E5406A Soft Touch Pro footprints, when the B4623B SW is installed. For custom embedded applications, where changes are made to default configurations, refer to on-line help in the logic analyzer software application for details on the...
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Related literature: Publication title U4154A Logic Analyzer Module Data Sheet Agilent Technologies 16900 Series Logic Analysis System Color Brochure Agilent W3630A Series DDR3 DRAM BGA Data Sheet B4622B DDR2/3/4 LPDDR2/3 Protocol Compliance and Analysis Tool Data Sheet For software downloads refer to: www.agilent.com/find/la-sw-download Required/recommended software Logic and protocol analyzer software (required) B4623B (required) Bus decoder for LPDDR, LPDDR2, LPDDR3 debug and validation DDR Setup Assistant and DDR Eyefinder (recommended) Protocol compliance and analysis toolset for...
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For more information on Agilent Technologies’ products, applications or services, please contact your local Agilent office. The complete list is available at: Agilent Email Updates www.agilent.com/find/emailupdates Get the latest information on the products and applications you select. www.lxistandard.org LAN extensions for Instruments puts the power of Ethernet and the Web inside your test systems. Agilent is a founding member of the LXI consortium. Agilent Channel Partners www.agilent.com/find/channelpartners Get the best of both worlds: Agilent’s measurement expertise and product...
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