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TLA6400 Series Datasheet

TLA6400 Series Datasheet
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Tektronix Logic Analyzers TLA6400 Series Datasheet Comprehensive set of signal integrity tools that allow you to quickly isolate, identify, and debug complex signal integrity issues Glitch Trigger and Storage - Allows you to trigger on and highlight potential signal integrity problems. Not only can the TLA6400 Series trigger on the problem, but by highlighting suspected problems in red, you will easily determine which signals you need to investigate further. iCapture -Route the suspected signal to the analog output of the TLA6400 Series using the exclusive Tektronix iCapture feature. This eliminates the need to double-probe with an oscilloscope probe, reducing time to debug. iView - Time-correlated view of both logic analyzer and oscilloscope data to trace the SI problem across the digital and analog domain. Tektronix TLA6400 Series logic analyzers provide a significant priceperformance breakthrough for digital debug. Features and benefits Performance and ease of use to debug, validate, and optimize digital systems 40 ps resolution MagniVu™ Acquisition to accurately see signal relationships in your system State Speed - Sample your fastest synchronous buses with clock rates up to 667 MHz and data rates up to 1333 Mb/s 15 in. display, with optional touch screen to see more of your data and navigate efficiently through your data 4 models with 34/68/102/136 channels and up to 64 Mb record length offer flexible solutions to fit any budget Drag-and-Drop Triggering - Simply drag any one of eight different trigger types from a table to the waveform and the TLA will automatically set up the trigger conditions. Eliminates errors, improves repeatability, and saves time. Applications Digital hardware validation and debug Monitoring, measurement, and optimization of digital hardware performance Embedded software integration, debug, and verification Efficiently debug and validate your digital system at a price you will like! The affordable TLA6400 Series logic analyzers offer the performance needed to debug, validate, and optimize the functionality of your digital system. The TLA6400 Series provides a comprehensive set of signal integrity debug tools that allow you quickly isolate, identify, and characterize elusive and hard-to-find problems. Add a broad range of support for today's applications, and you have the ideal tool to help you meet all of the debug challenges of today's digital designs. Drag-and-Drop measurements - Simply drag an icon from the measurement toolbar and drop it on your signal of interest and get a table of results. Saves time, removes complexity, and reduces measurement uncertainty.

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The TLA6400 Series allows you to effectively validate and debug the functionality of your digital designs: Use the patented 25 GHz MagniVu technology to accurately measure timing relationships. The single, integrated acquisition architecture of the TLA6400 Series eliminates the timing skew problems inherent in other logic analyzer architectures. Capture buses with clock rates up to 667 MHz and data rates up to 1333 Mb/s. Buy the capability you need now and upgrade as your measurement needs grow. Quickly isolate events through a simple and intuitive drag-and-drop trigger setup. Easily...

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Tektronix Logic Analyzers – TLA6400 Series DDR2/DDR3 protocol debug and validation solutions DDR2 memory DDR3 memory Up to DDR2-1333 (667 MHz clock) state measurements on Addr/Cmd/ Up to DDR3-1333 (667 MHz clock) state measurements on Addr/Cmd/ Data. 1 Data. 1 x4/x8 Configurations Requires 68 channel model or higher (Option 1T required for DDR2-800, DDR2-1067, and DDR2-1333) Requires 68 channel model or higher (Option 1T required for DDR3-800, DDR3-1067, and DDR3-1333) Memory Chip Interposer 2: NEX-DDR2MP60BLASK (socketed) or NEXDDR2MP60BLA (non-socketed) NEX-PRB1XL64 (requires 2)...

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Specifications All specifications are guaranteed unless noted otherwise. All specifications apply to all models unless noted otherwise. TLA6400 selection guide Characteristic High-speed timing 25 GHz (40 ps) with 128 Kb record length Maximum timing sample rate (Half/ Full channel) Maximum State clock rate 333 MHz (standard) 667 MHz (with Option 1T) Maximum State data rate 667 Mb/s (standard) 1333 Mb/s (with Option 1T) Maximum record length 2 Mb (standard) 4 Mb (Option 1S) 8 Mb (Option 2S) 16 Mb (Option 3S) 32 Mb (Option 4S) 64 Mb (Option 5S) 4 fixed channels (standard) Any signal (user...

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Tektronix Logic Analyzers – TLA6400 Series PC characteristics ® Operating system Microsoft Windows 7 Ultimate, 64-bit Intel Core i3-2120, 3.3 GHz, 3M Cache Line In, Line Out, and Mic In connectors 3.5 in., ≥500 GB Serial ATA, 7200 RPM Optical drive External display port type External display resolution Up to 1920 × 1200 noninterlaced at 32-bit color, each for both primary and secondary displays Network port Five (5) USB 2.0 ports and two (2) USB 3.0 ports. USB ports can be disabled in BIOS. Integral controls Front panel display Size: 15 in. (38.1 cm) diagonal Type: Active-matrix color TFT...

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Integrated View (iView™) capability Setup iView™ external oscilloscope wizard automates setup. Data correlation After oscilloscope acquisition is complete, the data is automatically transferred to the TLA and time correlated with the TLA acquisition data. Deskew The oscilloscope and TLA data is automatically deskewed and time correlated when using the iView™ external oscilloscope cable. oscilloscope cable length oscilloscope cable length Symbolic support Number of symbols/ranges Unlimited (limited only by amount of virtual memory available on TLA) Object file formats supported IEEE695, OMF...

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Tektronix Logic Analyzers - TLA6400 Series Physical characteristics Shipping weight Input characteristics Threshold selection range Threshold presets include TTL (1.5 V), CMOS (1.65 V), ECL (-1.3 V), PECL (3.7 V), LVPECL (2.0 V), LVCMOS 1.5 V (0.75 V); LVCMOS 1.8 V (0.9 V), LVCMOS 2.5 V (1.25 V), LVCMOS 3.3 V (1.65 V), LVDS (0 V), and user defined. Threshold selection channel Separate selection for each channel Threshold accuracy 23 °C ±5 °C ±(50 mV +1% of threshold voltage setting) of threshold voltage setting Input voltage range Minimum input voltage swing 300 mV (P5910 and P5960) State...

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