X-Class HiPerFET™ IXFH40N80XA Power MOSFET AEC Q101 Qualified N-Channel Enhancement Mode Avalanche Rated Fast Intrinsic Diode Advance Technical Information Test Conditions_Maximum Ratings TC= 25°C, Pulse Width Limited by TJM 80 A Maximum Lead Temperature for Soldering 300 °C Mounting Torque 1.13 / 10 Nm/lb.in Symbol Test Conditions Characteristic Values • International Standard Package • High Voltage Package Low RDS(ON) and Qg • Avalanche Rated • Low Package Inductance Advantages • High Power Density • Easy to Mount • Space Savings Applications • Switch-Mode and Resonant-Mode Power Supplies • DC-DC Converters • PFC Circuits • AC and DC Motor Drives • Robotics and Servo Controls © 2018 IXYS CORPORATION, All Rights Reserved

(TJ = 25°C, Unless Otherwise Specified) Min. Source-Drain Diode Symbol Test Conditions Characteristic Values (TJ = 25°C, Unless Otherwise Specified) Min. Note 1. Pulse test, t < 300ps, duty cycle, d < 2%. ADVANCE TECHNICAL INFORMATION The product presented herein is under development. The Technical Specifications offered are derived from a subjective evaluation of the design, based upon prior knowledge and experience, and constitute a "considered reflection" of the anticipated result. IXYS reserves the right to change limits, test conditions, and dimensions without notice. IXYS Reserves the Right...

IXFH40N80XA Fig. 2. Extended Output Characteristics @ TJ = 25ºC Fig. 4. RDS(on) Normalized to ID = 20A Value vs. Junction Temperature Fig. 5. RDS(on) Normalized to ID = 20A Value vs. Drain Current Fig. 6. Normalized Breakdown & Threshold Voltages vs. Junction Temperature BVDSS / VGS(th) - Normalized RDS(on) - Normalized © 2018 IXYS CORPORATION, All Rights Reserved

Fig. 7. Maximum Drain Current vs. Case Temperature 45 50 Fig. 10. Forward Voltage Drop of Intrinsic Diode Capacitance - PicoFarads IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

IXFH40N80XA Fig. 13. Output Capacitance Stored Energy Fig. 14. Forward-Bias Safe Operating Area 100 TC = 25 C Fig. 15. Maximum Transient Thermal Impedance Single Pulse Fig. 15. Maximum Transient Thermal Impedance aaaaa Pulse Width - Second © 2018 IXYS CORPORATION, All Rights Reserved

IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

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