2nd Generation Intel® Core? Mobile Processor Datasheet, Vol. 1
170Pages

2nd Generation Intel® Core™ Processor Family Mobile and Intel® Celeron® Processor Family Mobile Datasheet, Volume 1 Supporting Intel® Core™ i7 Mobile Extreme Edition Processor Series and Intel® Core™ i5 and i7 Mobile Processor Series Supporting Intel® Celeron® Mobile Processor Series

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Legal...

Revision History Revision Number 001 Description • Initial Release • Added Core™ i7-2677M, i7-2637M, and i5-2557M processors • Added Intel® Celeron® B800 and 847 processors • Added Intel® Celeron® 787 and 857 processors • Added Intel® Core™ i7-2960XM, i7-2860QM, i7-2760QM, and i7-2640M processors • Added Intel® Celeron® B840 processor • Added Intel® Celeron® B830, 887 processors

Introduction The 2nd Generation Intel® Core™ processor family mobile and Intel® Celeron® processor family mobile are the next generation of 64-bit, multi-core mobile processor built on 32- nanometer process technology. Based on a new micro-architecture, the processor is designed for a two-chip platform. The two-chip platform consists of a processor and Platform Controller Hub (PCH). The platform enables higher performance, lower cost, easier validation, and improved x-y footprint. The processor includes Integrated Display Engine, Processor Graphics and Integrated Memory Controller and is...

Figure 1-1. Mobile Platform System Block Diagram Example Discrete Graphics Embedded Display Intel* Flexible LVDS Flat Panel Network Connection

Processor Feature Details • Four or two execution cores • A 32-KB instruction and 32-KB data first-level cache (L1) for each core • A 256-KB shared instruction/data second-level cache (L2) for each core • Up to 8-MB shared instruction/data third-level cache (L3), shared among all cores Supported Technologies • Intel® Virtualization Technology (Intel® VT) for Directed I/O (Intel® VT-d) • Intel® Virtualization Technology (Intel® VT) for IA-32, Intel® 64 and Intel® Architecture (Intel® VT-x) • Intel® Active Management Technology 7.0 (Intel® AMT 7.0) • Intel® Trusted Execution Technology...

• Memory organizations — Single-channel modes — Dual-channel modes - Intel® Flex Memory Technology: - Dual-channel symmetric (Interleaved) • Command launch modes of 1n/2n • On-Die Termination (ODT) • Asynchronous ODT • Intel® Fast Memory Access (Intel® FMA) — Just-in-Time Command Scheduling — Command Overlap — Out-of-Order Scheduling PCI Express* • PCI Express* port(s) are fully-compliant with the PCI Express Base Specification, Revision 2.0. • Processor with mobile PCH supported configurations PCI Express* Supported Configurations in Mobile Products Configuration 1 • The port may negotiate...

• Traditional AGP style traffic (asynchronous non-snooped, PCI-X Relaxed ordering) • Peer segment destination posted write traffic (no peer-to-peer read traffic) in Virtual Channel 0 — DMI -> PCI Express* Port 0 — DMI -> PCI Express* Port 1 — PCI Express* Port 0 -> DMI — PCI Express* Port 1 -> DMI • 64-bit downstream address format, but the processor never generates an address above 64 GB (Bits 63:36 will always be zeros) • 64-bit upstream address format, but the processor responds to upstream read transactions to addresses above 64 GB (addresses where any of Bits 63:36 are nonzero) with an...

• Supports the following traffic types to or from the PCH — DMI -> DRAM — DMI -> processor core (Virtual Legacy Wires (VLWs), Resetwarn, or MSIs only) — Processor core -> DMI • APIC and MSI interrupt messaging support — Message Signaled Interrupt (MSI and MSI-X) messages • Downstream SMI, SCI and SERR error indication • Legacy support for ISA regime protocol (PHOLD/PHOLDA) required for parallel port DMA, floppy drive, and LPC bus masters • DC coupling – no capacitors between the processor and the PCH • Polarity inversion • PCH end-to-end lane reversal across the link • Supports Half Swing...

Embedded DisplayPort* (eDP) • Stand alone dedicated port (unlike previous generation processor that shared pins with PCIe interface) Intel® Flexible Display Interface (Intel® FDI) • For SKUs with graphics, Intel FDI carries display traffic from the Processor Graphics in the processor to the legacy display connectors in the PCH • Based on DisplayPort standard • Two independent links – one for each display pipe • Four unidirectional downstream differential transmitter pairs — Scalable down to 3X, 2X, or 1X based on actual display bandwidth requirements — Fixed frequency 2.7 GT/s data rate •...

Processor Graphics Controller • Intel® Rapid Memory Power Management (Intel® RMPM) – CxSR • Intel® Graphics Performance Modulation Technology (Intel® GPMT) • Intel Smart 2D Display Technology (Intel S2DDT) • Graphics Render C-State (RC6) • Intel Seamless Display Refresh Rate Switching with Embedded DisplayPort* Thermal Management Support • Digital Thermal Sensor • Intel Adaptive Thermal Monitor • THERMTRIP# and PROCHOT# support • On-Demand Mode • Open and Closed Loop Throttling • Memory Thermal Throttling • External Thermal Sensor (TS-on-DIMM and TS-on-Board) • Render Thermal Throttling •...