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BSZ063N04LS6

Product catalog summary

Overview: The document is a technical data sheet for the OptiMOS™ 6 Power-Transistor, specifically the BSZ063N04LS6 model, which is a 40V N-channel MOSFET optimized for synchronous applications. It features very low on-resistance, superior thermal resistance, and is 100% avalanche tested. It is also RoHS compliant and halogen-free.

Key Specifications:

Drain-Source Voltage (V_DS): 40 V
Maximum On-Resistance (R_DS(on)): 6.3 mΩ
Continuous Drain Current (I_D): 40 A
Gate Charge (Q_G): 9.5 nC (0V to 10V)
Thermal Resistance (R_thJC): 4 °C/W (junction to case, bottom)

Maximum Ratings: The transistor can handle a continuous drain current of up to 40 A at 25°C and a pulsed drain current of 160 A. The gate-source voltage range is -20 V to 20 V, and it can operate within a temperature range of -55°C to 175°C.

Thermal Characteristics: The thermal resistance from junction to case is specified as 4 °C/W, and from junction to ambient as 60 °C/W when mounted on a PCB with a specified copper area.

Electrical Characteristics: The drain-source breakdown voltage is 40 V, with a gate threshold voltage ranging from 1.3 V to 2.3 V. The on-state resistance varies with gate-source voltage and drain current, with typical values provided for different conditions.

Dynamic Characteristics: The transistor has an input capacitance of 650 pF and a turn-on delay time of 3 ns. The total gate charge is 9.5 nC for a 10V gate-source voltage.

Diagrams and Graphs: The document includes various diagrams illustrating power dissipation, drain current, safe operating area, and thermal impedance, among others. These provide visual insights into the performance characteristics under different conditions.

Package Information: The transistor is housed in a PG-TSDSON-8 FL package, with detailed dimensions provided.

Revision History: The document notes that the final version was released on June 4, 2018, with no major changes since the previous revision.

Legal and Safety Information: The document includes disclaimers regarding the use of the product in life-support and other critical applications, emphasizing the need for written approval from Infineon Technologies for such uses.

Catalog excerpts

MOSFET OptiMOSTM6 Power-Transistor, 40 V Features • Optimized for synchronous application • Very low on-resistance ^DS(on) • 100% avalanche tested • Superior thermal resistance • N-channel • Qualified according to JEDEC1) for target applications • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21 • 175 °C rated Table 1 Key Performance Parameters Type / Ordering Code 1) J-STD20 and JESD22 Final Data Sheet

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TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....

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at Ta=25 °C, unless otherwise specified Table 2 Maximum ratings Note / Test Condition Continuous drain current Avalanche energy, single pulse3 Gate source voltage Power dissipation Operating and storage temperature 2 Thermal characteristics Table 3 Thermal characteristics 11 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 pm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information Final Data Sheet

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at 7]=25 °C, unless otherwise specified Table 4 Static characteristics 11 Defined by design. Not subject to production test. 2) See "Gate charge waveforms" for parameter definition Final Data Sheet

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Table 7 Reverse diode 11 Defined by design. Not subject to production test. Final Data Sheet

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Diagram 2: Drain current Diagram 3: Safe operating area Diagram 4: Max. transient thermal impedance 103 tp [s] Zthjc=f(fp); parameter: D=fp/T Final Data Sheet

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Diagram 5: Typ. output characteristics Diagram 6: Typ. drain-source on resistance Final Data Sheet Rev. 2.0, 2018-06-04

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Diagram 9: Normalized drain-source on resistance Diagram 10: Typ. gate threshold voltage _Tj_[°C]_ /GS(th=f(Tj), /gs=/ds; parameter: Id Diagram 12: Forward characteristics of reverse diode Final Data Sheet

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Diagram Gate charge waveforms Final Data Sheet

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Figure 1 Outline PG-TSDSON-8 FL, dimensions in mm/inches Final Data Sheet

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OptiMOS™ 6 Power-Transistor, 40 VBSZ063N04LS6Revision History BSZ063N04LS6 Revision: 2018-06-04, Rev. 2.0Previous Revision Revision Trademarks All referenced product or service names and trademarks are the property of their respective owners. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] Published by Infineon Technologies AG 81726 Munchen, Germany © 2018...

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BSZ063N04LS6

BSZ063N04LS6

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