PRODUCT SUMMARY SHEET MB86064 & MB86065 sretrevnoC golanA ot latigiD ecnamrofreP hgiH uoy htiw worromot gnipahs Overview MB86064 & MB86065 represent Fujitsu Semiconductors’ 2nd generation of high performance digital to analog converters (DACs). • • 4-wire Serial Control Interface Clock Output 1 (LVDS) Control Interface (1.8V LVCMOS) Clock Output 2 (LVDS) RF Clock Input (½ DAC rate) Port A Data Input (14-bit LVDS) Loop-Clock Output (LVDS) Double-Edge clocked Waveform Memory Module Loop-Clock Input (LVDS) Waveform Waveform Memory Memory A A (16k Points) Waveform Waveform Memory Memory B B (16k Points) (16k Points) Port B Data Input (14-bit LVDS) The MB86064 is ideally suited to radio applications providing dual transmit or transmit with diversity. The MB86065 supports conversion rates up 1.3GSa/s enabling higher generating frequencies combined with wider spurious-free generating regions. Radio communications & test systems e.g. UMTS, LTE 2x20MHz TDD/FDD Ultra-Wideband & multi-carrier systems Remote Radio Heads (RRHs) Linear & Doherty power amplifiers with crest factor reduction and digital pre-distortion Micro / Millimeter wave radio backhaul Cable modem multi-channel DRFI 16-ch DOCSIS or 12-ch EuroDOCSIS 64 & 256 QAM Medical & technology laser drive circuits For pulsed & arbitrary waveform generation Semiconductor scribing, dicing & drilling Low latency digital control systems e.g. particle accelerator electromagnets Medical & Test instrumentation Both devices feature the market’s shortest propagation delay combined with superior timedomain response for control based applications requiring low latency. Enables high direct-IF architectures for superior system performance & lower power Avoids the analog and digital overhead of IQ and direct conversion architectures Cost reduces DPD feedback by using IQ Supports multiple, including non-contiguous, narrow & wide band signal generation Integrated waveform memory for storing test and evaluation vectors on-chip ASK FUJITSU m o c . u s ti j u f . k u @ u e s f . s t c u d o r p l a n g i s d e xi m : l i a m - E / s r e t r e v n o c a t a d / s c i n o r t c el e o r c i m / s e c i v r e s / a e m e / m o c . u s t i j u f . w w w / / : p t t h

PRODUCT SUMMARY SHEET MB86064 & MB86065 sretrevnoC golanA ot latigiD ecnamrofreP hgiH uoy htiw worromot gnipahs System Integration Robust data interfacing, to compatible FPGAs & ASICs, is assured by a proprietary Loop-Clock architecture. This unique solution automatically maintains the necessary clock-to-data timing across variations in process, voltage and temperature (PVT). No calibration is required during production or over lifetime operation, thus avoiding otherwise potentially expensive total system costs. Development Kits • Americas Fujitsu Semiconductor America, Inc. Tel: +1 (408) 737-5600...