Product Overview
The Fujitsu MB86628 KeyWave™ II Quad AFE is a highly integrated analog front end designed for Central Office ADSL modems. It features four complete analog front ends, integrating high-resolution ADCs and DACs with active filtering to minimize external component requirements. This makes it ideal for cost, power, and space-sensitive applications.

Key Features

• Four full-rate ADSL analog front ends.
• Low power operation at 3.3V with power consumption of 235 mW/port (G.dmt) and 200 mW/port (G.lite).
• Integrated analog filters and 15-bit A/D & D/A converters.
• Programmable gain amplifier (PGA) range of 0 to +48 dB for each receive channel.
• Manufactured using 0.35µm CMOS technology with Triple Well for excellent isolation.
• Operates within an industrial temperature range of -40 °C to +85 °C.

Applications

• High port-density Central Office ADSL modem systems.
• Programmable for various ADSL derivatives.
• Compatible with FDM and echo cancelling systems.
• Supports ADSL over ISDN.

Functional Description
Each channel includes a 15-bit DAC with anti-imaging filters, a 15-bit ADC with anti-aliasing filter, and a PGA. The device features a clock multiplier and bandgap references on-chip, with a parallel data interface for high-speed data transfer and a serial interface for control and configuration. Integrated transmit interpolation filters reduce the data rate required by the modem.

Transmit and Receive Channels
Each receiver front end includes programmable attenuators and anti-aliasing filters with programmable cut-off frequency and gain control. The transmit paths feature an interpolating filter to increase the DAC update rate. The analog filters are programmable for both gain and frequency cut-off, with selectable frequency settings.

Data and Serial Control Interfaces
Data is transferred via a 2 x 8-bit unidirectional data interface. A 4-wire serial interface is provided for control and configuration, with 16-bit wide registers accessed using an 8-bit address and control word.

Clock Multiplier and VCXO Control
The device requires a clock source, either external or a VCXO, with a clock generator producing an 88MHz clock for internal use. The VCXO control uses a first-order sigma-delta DAC for external VCXO clock source control.

Development Kit
A development kit (DK86628-1) is available, including an evaluation board for device assessment. Contact Fujitsu for more information.

Disclaimer
The document is subject to change without notice, and customers should consult Fujitsu sales representatives before ordering. The information is provided "as is" without any implied licenses.