74LCX16245 Low Voltage 16-Bit Bidirectional Transceiver with 5V Tolerant Inputs and Outputs
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© 2005 Fairchild Semiconductor Corporation DS012001 www.fairchildsemi.com February 1994 Revised May 2005 74LCX16245 Low Voltage 16-Bit Bidirectional Transceiver with 5V Tolerant Inputs and Outputs 74LCX16245 Low Voltage 16-Bit Bidirectional Transceiver with 5V Tolerant Inputs and Outputs General Description The LCX16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The device is byte controlled. Each byte has separate control inputs which could be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. The LCX16245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. Features 5V tolerant inputs and outputs 2.3V–3.6V VCC specifications provided 4.5 ns tPD max (VCC 3.3V), 20 PA ICC max Power down high impedance inputs and outputs Supports live insertion/withdrawal (Note 1) r24 mA output drive (VCC 3.0V) Uses patented noise/EMI reduction circuitry Latch-up performance exceeds 500 mA ESD performance: Human body model ! 2000V Machine model ! 200V Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Note 2: Ordering code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Order Number Package Number Package Description 74LCX16245G (Note 2)(Note 3) BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 74LCX16245MEA (Note 3) MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 74LCX16245MTD (Note 3) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

www.fairchildsemi.com 2 74LCX16245 Connection Diagrams Pin Assignment for SSOP and TSSOP Pin Assignment for FBGA (Top Thru View) Pin Descriptions FBGA Pin Assignments Truth Tables H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Logic Diagrams Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. Pin Names Description OEn Output Enable Input T/Rn Transmit/Receive Input A0–A15 Side A Inputs or 3-STATE Outputs B0–B15 Side B Inputs or 3-STATE Outputs NC No Connect 1 2 3 4 5...

3 www.fairchildsemi.com 74LCX16245 Absolute Maximum Ratings(Note 4) Recommended Operating Conditions (Note 6) Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 5: IO Absolute Maximum Rating must be observed. Note 6: Unused inputs or I/O's must be held...

www.fairchildsemi.com 4 74LCX16245 DC Electrical Characteristics (Continued) Note 7: Outputs disabled or 3-STATE only. AC Electrical Characteristics Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Dynamic Switching Characteristics Capacitance Symbol Parameter Conditions VCC TA 40qC to 85qC Units (V) Min Max ICC Quiescent Supply Current...

5 www.fairchildsemi.com 74LCX16245 AC LOADING and WAVEFORMS Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and trec Waveforms 3-STATE Output Low Enable and Disable Times for Logic 3-STATE Output High Enable and Disable Times for Logic Setup Time, Hold Time and Recovery Time for Logic trise and tfall FIGURE 2. Waveforms (Input Characteristics; f =1MHz, tr = tf = 3ns) Test Switch tPLH, tPHL Open tPZL, tPLZ 6V at VCC 3.3 r 0.3V VCC x 2 at VCC 2.5 r 0.2V tPZH,tPHZ GND...

www.fairchildsemi.com 6 74LCX16245 Schematic Diagram Generic for LCX Family

7 www.fairchildsemi.com 74LCX16245 Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A

www.fairchildsemi.com 8 74LCX16245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A

9 www.fairchildsemi.com 74LCX16245 Low Voltage 16-Bit Bidirectional Transceiver with 5V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL...