ECS-PCIe/FPGA
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ECS-PCIe/FPGA PCI Express® EtherCAT® Slave Interface Convert your PCI Express System into an EtherCAT Slave Device • Add EtherCAT Slave (ECS) functionality to your PC • The EtherCAT Slave Controller address space is directly mapped to the PCI Express address space. Simple Configuration and Rapid Application Development • Easy configuration by esd's EtherCAT Master or other masters • Sample EtherCAT Slave Information File (ESI file in XML format) is provided • esd's EtherCAT Slave API library and sample code for rapid application development are included Related Products The EtherCAT Slave card is also available in PCI Express low profile form factor (ECS-PCIe/FPGA-LP). For XMC and PMC systems similar boards are available (ECS-XMC/FPGA, ECSPMC/FPGA). The FPGA connects between the PCI Express bus and the two Ethernet interfaces on the front panel. Versatile Application Because of this simple hardware topology and the use of a “soft” controller the design offers a maximum of flexibility. (This product is under development. It will be available Q3 2016.) 26-pin Shrouded Pin Header Connector Software Support Device drivers for Windows® and Linux® with documentation and EtherCAT slave examples are included in the scope of delivery. Drivers for other operating systems, especially real-time operating systems, are available on request. EtherCAT Slave Interface for PCI Express The ECS-PCIe/FPGA is an EtherCAT Slave Controller board designed for the PCI Express bus. It utilizes a Beckhoff IP-core which is implemented in an Altera® FPGA and configured for 8 FMMUs, 8 Sync Managers, 60 kB DPRAM and 64 bit Distributed Clocks. Customization on Request • 20 of the LVTTL I/Os can be configured as 10 I/Os with 2.5 V level LVDS • Other customized configurations are available on request. 26-pin Shrouded Pin Header Connector SYNC/Latch I/Os and Share I/Os Via pin header connectors equipped on the ECS-PCIe/FPGA 36 3.3 V LVTTL I/Os are available, including the signals from the EtherCAT Slave Controller: 2x Sync and 2x Latch for system synchronization. Bus Master Support • The FPGA contains Bus Master DMA support to offload the CPU from copying the output process image data into the host memory. This is utilized by the esd EtherCAT Slave Stack PCIe Card Edge Connector The PCI Express system can act as an I/O node. An EtherCAT master can use several EtherCAT protocols like CoE, FoE and EoE to communicate with this EtherCAT slave device. Temp. Sensor Technical Specifications: PCI Express Interface: PCIe endpoint FPGA General: Supply voltage PCIe port Lanes Power consumption PMAX = 3 W Ambient temperature Operational: 0...65 °C According to PCI Express Specification R1.0a One Lane PCI Express Link Form factor Connectors Standard and low profile version available PCI Express card edge, JTAG pin header, 2x 26-pin shrouded pin header EtherCAT Slave Controller: ECS controller Beckhoff IP Core integrated in FPGA + 2x MII Phy (Micrel KSZ8081MNX) ECS interface LEDs 2x RJ45, 100BASE-TX, 100 Mbit/s, according to IEEE 802.3, electrically isolated Error, Run, Link/Activity per channel, 2x User LEDs 3.3 V DC from PCI Express connectors Relative humidity Dimensions [mm] Max. 90 % (non-condensing) 120 mm x 68,9 mm x 14 mm without front panel (length x width x height) Order Information: Designation ECS-PCIe/FPGA PCIe EtherCAT card, incl. driver, ECS-Stack as binary and manual for Windows and Linux ECS-PCIe/FPGA-LP Low profile version ©2016 esd electronic system design gmbh, Hannover All data are subject to change without prior notice. I:\Texte\Doku\DBL\EtherCAT\Englisch\Source\ECS-PCIe-FPGA_Datasheet_en_12.odt EtherCAT® is registered trademark and patented technology. PCI EXPRESS® is a registered trademark of PCI-SIG All trademarks are reserved by their respective owners. esd electronic system design gmbh Vahrenwalder Str. 207 30165 Hannover / Germany