• High-resolution sensor with 1920 × 4608 pixels, each 16 µm square.
• Eight parallel analogue output ports for efficient data processing.
• Back-illuminated for enhanced sensitivity and low readout noise, ideal for astronomy and scientific applications.
• Can be tiled on three sides to create large focal plane arrays.

The CIS113 sensor features a large image area of 30.72 mm × 73.73 mm, read out through eight parallel analogue output ports. It supports a rolling shutter mode and allows for high frame rates by reading selected regions of interest (ROI), making it suitable for applications like star field monitoring.

At −25 °C, Grade 1 devices meet specified electro-optical limits. Key parameters include a pixel size of 16 µm, a frame rate of 1.8 fps for the full array, and a dynamic range of 76 dB. The sensor exhibits low readout noise and dark current, with a quantum efficiency of up to 50% at 800 nm.

The sensor's spectral response is optimized with an anti-reflection coating, providing high efficiency in the visible range. Custom coatings are available for different spectral requirements.

Grade 1 devices have strict defect limits, including a maximum of 1% bright pixel defects and specific limits for column and row defects. Grade 5 devices may not meet all specifications, while Grade 6 are non-functional mechanical samples.

• Back-Thinning: Process to enhance sensitivity by illuminating from the reverse side.
• AR Coating: Anti-reflection coating to improve quantum efficiency.
• Correlated Double Sampling (CDS): Technique to reduce noise by subtracting reset noise from the signal.

The sensor's architecture includes eight blocks of 240 columns, each with separate read circuits. The design allows for independent row addressing for each half of the pixel array, optimizing performance for specific applications.

The CIS113 sensor uses a 5T pixel design, incorporating a global-reset transistor for either rolling or global shutter operations. The design optimizes transistors for low noise and efficient charge transfer. The epitaxial layer is thicker and has higher resistivity to improve sensitivity at IR wavelengths while maintaining good modulation transfer function (MTF).

The sensor uses local control signals derived from pin signals to manage pixel operations. The document explains the sequence of operations for reading pixel data, including the use of reset and transfer transistors. The odd-even sampling technique allows for higher frame rates by alternating readout paths.

This technique involves two readout paths, allowing one row to be sampled while another is being output. This method increases frame rates, especially when imaging sparse regions of interest (ROI). The document provides timing diagrams to illustrate the odd-even sampling process.

The document outlines the three phases of timing for reading the CIS113 sensor: setting up row addresses, reading and sampling pixel levels, and scanning required columns. It details the control signals and timing sequences necessary for efficient operation, including the use of PIX_BUF_LOAD for odd-even sampling.

• Row and Column Address Timing: The document outlines the timing for loading row and column addresses, emphasizing the use of serial data streams and specific clock signals (ROW_CLK_L/R, COL_CLK).
• Typical Timing Values: Various timing parameters such as tSHR, tTRA, and tSHS are specified, with typical values provided for optimal sensor performance.

• Read Timing: The sequence for operating the image sensor is detailed, including the loading of row addresses and the use of PIX_SEL_L/R for image capture.
• Global Shutter Operation: An alternative to the rolling shutter, allowing synchronous sampling of all pixels, is described with a typical timing diagram.

• Temperature and Power Supplies: The document specifies operating temperature ranges and power supply requirements, emphasizing the importance of maintaining specific voltage levels for optimal performance.
• Bias Currents: Recommended bias currents for various components are provided to ensure accurate and repeatable performance.

• Rolling Shutter Mode: Describes the sequential processing of rows, allowing for a steady flow of signal with overlapping frame timing.
• Global Shutter Mode: Details the simultaneous selection of all half rows for synchronous pixel sampling.

• Maintain operating temperatures at or below 20°C to ensure image quality.
• Use active current sources for bias currents to achieve good accuracy.
• Adjust supply levels to optimize performance for specific applications.

• Table 5: Column address timing values with specific setup and hold times.
• Table 6: Typical timing values for various operations, highlighting the importance of specific pulse widths and delays.
• Table 7: Operating temperature and power supply values, with notes on the impact of temperature on image quality.
• Table 8: Bias currents for column pull-down, read circuits, and output drivers.

The document outlines the binary codes for pixel row addresses, indicating that row addresses with bits [10:0] at 10010000000 and above do not select any row of pixels. At power-on, all row address registers are set to 1111111111111, which does not select any row.

A test mode is described to check the operation of the readout path from photodiodes to output pins. This involves setting half-row addresses, driving PIX_TRA_L/R and PIX_SEL_L/R, and alternating VREFR levels to plot the transfer function.

The document explains the loading of eight-bit column addresses using signals COL_CLK, COL_SER_IN_[7:0], and COL_LOAD. Binary coded values are used, with specific codes for selecting signal paths and pre-charge modes.

Several test features are included for factory testing, not intended for customer use. Pins related to these tests should be grounded.

The package is designed for three-side butting to form a large focal plane. It includes a 76-pin ceramic PGA and an invar block with mounting and guide pins. Mechanical details such as image area, die size, and package dimensions are provided.

A detailed list of pins and their functions is provided, including digital and analogue supply pins, control signals, and test pins.

A PT100 temperature sensor is included for temperature control, with specific resistance and temperature coefficient characteristics.

The document specifies voltage levels, capacitance, leakage currents, and power dissipation for the sensor's electrical interface.

The document describes the use of sixteen video output buffers, which are standard five-transistor operational amplifiers configured as voltage followers. These buffers provide accurate unity voltage gain with minimal noise, enhancing the signal-to-noise ratio (SNR) compared to simple source follower output stages.

A low current design is used to minimize noise, requiring low load capacitance for optimal pixel rates. The document illustrates the impact of varying capacitance on settling time, emphasizing the need for a buffer when high input capacitance is present in external electronics.

The document lists the absolute maximum ratings for various parameters, such as voltage and temperature, which should not be exceeded to avoid permanent damage to the device. It includes specific voltage limits for different pins and operational conditions.

A detailed sequence for powering up and down the device is provided to ensure compliance with maximum ratings and safe operation. This includes setting control signals, driving supplies to correct levels, and managing bias currents.

The document highlights the static sensitivity of CMOS sensors and recommends antistatic handling precautions, such as using grounded workbenches and wrist straps, to prevent damage.

Specific unpacking and handling instructions for the CIS113 sensor are mentioned, with additional guidance available upon request.

The document notes that high energy radiation can alter performance parameters and recommends consulting e2v technologies for operation in such environments.

The CIS113-40-g-M16 part is described, with details on its construction and available variants. Options for different sizes and coatings are mentioned, along with potential custom variants.

The document confirms that current production CIS113 sensors are RoHS compliant, having replaced lead-based solder with conductive adhesive.