PI6LC58S1101

PI6LC58S1101
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PI6LC58S1101

Product catalog summary
Overview: The PI6LC58S1101 is a high-performance Ethernet network clock generator by Diodes Incorporated, designed for low phase noise and jitter applications in 10GbE to 400GbE networks. It features a proprietary LC VCO-based PLL design.
Key Features:
  • Operates at 3.3V supply voltage.
  • Supports crystal/CMOS and differential inputs at 25MHz/50MHz.
  • Selectable output frequencies and signaling types (LVPECL or LVDS).
  • Very low RMS phase jitter (0.08ps typical at 156.25MHz).
  • Excellent phase noise performance (-145dBc/Hz at 100kHz offset).
  • Supports industrial temperature ranges from -40°C to 85°C.
  • Complies with RoHS and is lead-free, halogen, and antimony-free.
Functional Description: The device includes four independently configurable output banks for different frequencies and output signaling types, managed via control pins for hardware-level adjustments.
Pin Configuration: Detailed pin descriptions are provided, including power supply pins, differential clock outputs, and control inputs for each output bank, along with a block diagram of the PLL and output bank structure.
Operating Conditions: Operates with a core power supply voltage range of 3.135V to 3.465V and supports ambient temperatures from -40°C to 85°C. Maximum ratings for storage temperature, supply voltage, and input voltage are provided.
Electrical Characteristics: Detailed characteristics for input and output parameters, including internal resistances, capacitances, and voltage levels for LVCMOS and differential inputs.
AC Output Characteristics: Specifies output frequency, rise and fall times, duty cycle, phase jitter, and phase noise for LVPECL and LVDS outputs. Details on power supply noise rejection and startup times are included.
Application Information: Recommendations for unused input and output pins emphasize proper configuration for optimal performance.
Crystal Oscillator Input: XTAL_IN and XTAL_OUT can be left floating, with a 1kΩ resistor from XTAL_IN to ground for protection.
Reference Inputs: IN+/IN- can be left floating or connected with a 1kΩ resistor to ground for protection.
LVCMOS Control Pins: Internal pulldowns are present; a 1kΩ resistor to ground provides additional protection.
Outputs: Unused outputs should be left open to save power and minimize EMI.
Crystal Circuit Connection: For a CL=12pF crystal, use C1=12pF and C2=12pF, adjusting to fine-tune the target ppm according to board layouts.
Recommended Crystal Specification: Diodes recommends FL2500158 and FL2500221 crystals, SMD 3.2x2.5(4P), 25MHz, CL=12pF, with different ppm tolerances.
Placement & Routing: Use 0.1μF bypass capacitors for each VDD pin, with a 1uF capacitor in parallel for better decoupling, placed close to the device.
Thermal Pad Vias: Design vias with a count density from 1mm to 1.25mm for heat dissipation, consulting PCB manufacturers for guidelines.
Crystal Input Design: Design external load capacitors C1 and C2 to match the crystal datasheet CL equivalent. For 25MHz or higher, use C1=C2=2*(CL-6) as a starting formula.
X_IN/CMOS Input: X_IN can be treated as a CMOS input pin if its input V_swing is full rail VDD. For lower V_swing, AC coupling to X_IN is recommended.
Differential Clock Input: LVPECL and LVDS XO require a 100ohm differential termination, with AC coupling in front of the 100ohm cross.
Output Clock Routing Design: Prioritize clock timing in PCB design, controlling trace vias count to less than 3-4 and maintaining adequate spacing from other signal traces.
Power Supply Decoupling Consideration: Follow decoupling suggestions for various power supply pins, connecting capacitors to GND or between critical pins as specified.
Phase Noise Plots: Provided for 156.25MHz LVPECL Clock.
Ordering Information: PI6LC58S1101ZDIEX is available in a 64-Contact TQFN package, compliant with RoHS directives.
Important Notice: Diodes Incorporated disclaims warranties and liabilities related to the document and products described. Products are not authorized for use in life support devices without express written approval.
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Catalog excerpts

PI6LC58S1101-1

A product Line of Diodes Incorporated Lead-free Green PI6LC58S1101 11 Outputs HiFlex™ Ethernet Network Clock Generator The PI6LC58S1101 is very low jitter clock generator target for applications that demand extremely low phase noise, such as 10GbE, 40GbE, 100GbE, and 400GbE. It uses Diodes' proprietary LC VCO-based PLL design to achieve an optimum combination of those popular networking clock frequencies and low phase noise performance along with high power supply noise rejection. ÎÎ Crystal/CMOS Input: 25MHz/50MHz ÎÎ Differential Input: 25MHz/50MHz ÎÎ Selectable Output Frequencies ÎÎ Four Output Banks with Selectable Output Signaling: LVPECL or LVDS low RMS Phase jitter: 0.08ps (typ.), 156.25MHz (10kHz to 20MHz) ÎÎ Excellent phase noise: -145dBc/Hz, 156.25MHz at 100kHz offset ÎÎ Power Supply Noise Rejection: -55dBc ÎÎ Industrial Temperature Support: -40°C to 85°C ÎÎ Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) ÎÎ Halogen and Antimony Free. “Green” Device (Note 3) ÎÎ For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/ ÎÎ Packaging (Pb-free & Green): 64-lead 9mm × 9mm TQFN ÎÎ Very The PI6LC58S1101 has four output banks which can be configured independently for different frequencies and different output signaling types based on control pins. The pin control method provides an easy way to configure the device at the hardware level. Block Diagram Bank A 4 DIVA CONTROL REGISTERS Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6LC58S1101

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PI6LC58S1101-2

A product Line of Diodes Incorporated Power supply voltage for output Bank B Bank B, Differential clock output, LVPECL or LVDS Bank B, Differential clock output, LVPECL or LVDS Bank B, Differential clock output, LVPECL or LVDS Bank B, Differential clock output, LVPECL or LVDS Bank B, Differential clock output, LVPECL or LVDS Bank B, Differential clock output, LVPECL or LVDS Bank B, Differential clock output, LVPECL or LVDS Bank B, Differential clock output, LVPECL or LVDS Power supply voltage for output Bank B Pullup/ Control input for output Bank D. 3-level signals Pulldown Pullup/ Control input...

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PI6LC58S1101-3

A product Line of Diodes Incorporated Pullup/ Control input for output Bank B. 3-level signals Pulldown Pullup/ Control input for output Bank B. 3-level signals Pulldown Pullup/ Control input for output Bank C. 3-level signals Pulldown Pullup/ Control input for output Bank C. 3-level signals Pulldown Internal VCO bias decoupling capacitor. Use a 4.7μF capacitor between the CAP_BIAS and GND Analog Power supply voltage for PLL 1uF decoupling capacitor between CR amd VDDA Ground return path for PLL loop filter Loop filter/ charge pump output for PLL. Connect to external loop filter Analog Power...

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PI6LC58S1101-4

A product Line of Diodes Incorporated Description Selects input reference source. LVCMOS interface levels. Pulldown 0 = Crystal input on pins X_IN, X_Out (default) 1 = Reference clock input on pins IN+, IN- Pullup/ Differential clock input Pulldown Internal resistor bias to VDD_CLK/2 Pulldown Differential clock input Crystal oscillator circuit decoupling capacitor. Use a 4.7μF capacitor between the CAP_XTAL and the GND terminals. Crystal in, the input also supports being driven by a single-ended crystal oscillator or reference clock Analog power supply voltage for the crystal oscillator Power...

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PI6LC58S1101-5

A product Line of Diodes Incorporated PI6LC58S1101 Input MUX Selection IN_SEL Input Source Crystal Input (X_IN, X_OUT) Input Frequency Selection FREQ_IN Input Source Bank A Differential Output Control NA[1] Output Types Power Down, both outputs of the differential output pair will drive a logic-high level Bank B Differential Output Control NB[1] Output Types Power Down, both outputs of the differential output pair will drive a logic-high level March 2020 Diodes Incorporated

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PI6LC58S1101-6

A product Line of Diodes Incorporated PI6LC58S1101 Bank C Differential Output Control NC[1] Output Types Power Down, both outputs of the differential output pair will drive a logic-high level Bank D Differential Output Control ND[1] Output Types Power Down, both outputs of the differential output pair will drive a logic-high level PLL Loop Bandwidth and Loop Filter The PI6LC58S1101 PLL requires an external loop filter. The components of the filter are connected in between the ICP (pin32) and LFFR (pin27). PLL loop bandwidth generally depends on the loop components, charge pump current, PFD frequency,...

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PI6LC58S1101-7

A product Line of Diodes Incorporated Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Operating Conditions Symbol Core Power Supply Voltage Output Power Supply Voltage Analog Power Supply Voltage Power Supply Current All outputs loaded, Diff. Outputs are LVPECL...

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PI6LC58S1101-8

A product Line of Diodes Incorporated PI6LC58S1101 LVCMOS DC Electrical Characteristics for 3- Level Pins Symbol Input High Voltage Input Middle Voltage Input High Current Input Middle Current Differential Input DC Characteristics Symbol Input High Voltage Input Bias Voltage Input Differential Swing Differential peak to peak Crystal Characteristic Parameters Equivalent Series Resistance Load Capacitance, 50MHz crystal Load Capacitance, 25MHz crystal Shunt Capacitance Drive Level Cload Cshunt Note: 1. ESR value is dependent upon frequency of oscillation LVPECL Output DC Characteristics(1) Symbol...

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