FTI-1000 WAFER High power wafer test and sort 1 SITE HV WAFER PROBE (6KV/200A) The FTI‑1000 is designed for high‑coverage wafer‑level testing of semiconductor devices and wide‑bandgap technologies, with strong suitability for multisite probe applications. FTI‑1000 addresses the characterization needs of DC and AC parameters directly at wafer probe, supporting both engineering characterization and high‑volume wafer testing. Thanks to its modular Tester‑per‑Channel Board architecture, users can configure independent resources into a single flexible and scalable platform tailored to any wafer‑level test requirement. Control is managed through FTI Studio, an intuitive graphical interface that simplifies probe‑card bring‑up, test‑program development, and debug, making the system equally accessible to Designers and Test Engineers. OVERVIEW The FTI‑1000 is a purpose‑built ATE system designed for high‑coverage wafer‑level testing of power discrete devices, wide‑bandgap components, and gate‑driver‑integrated power ICs. Suitable for both engineering characterization and high‑volume wafer sort, the system integrates independent DC and AC test resources capable of measuring all key MOSFET parameters, including DC characteristics, ΔVsd, inductive switching (UIL/UIS/CIS), gate charge, and gate resistance. Its modular Tester‑per‑Channel Board architecture, built on a USB‑based framework, enables straightforward system expansion and configuration Easily to configure Simple setup and flexible options make it quick to tailor the system to your test needs Engineering test coverage Supports a wide range of electrical tests to fully characterise devices during development User Friendliness Clear interfaces and intuitive controls ensure smooth ope

flexibility for both single-site and multisite probe applications. With flexible resource partitioning and plug-in options such as high-voltage extensions, high-current pulse modules, digitizers, and LCR-based Rg measurement, the FTI-1000 adapts seamlessly to a wide range of wafer-level test requirements while maintaining a compact footprint. The architecture integrates cleanly with automated wafer probers and probe-card interfaces-without being tied to any specific mechanical platformmaking it equally effective for early-stage device characterisation, process development, and high-volume wafer-sort...