PCI SyncClock32: PCI Input/Output timing card with IRIG B, 1PPS and other time codes
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PCI SyncClock32: PCI Input/Output timing card with IRIG B, 1PPS and other time codes - 1

PCI-SyncClock32 Single-slot 32 bit 5 Volt PCI module IRIG A, B, NASA 36, 1 PPS sync inputs GPS sync option (maintains single-slot) Have Quick sync input option Propagation delay correction Zero latency time reads Match Time output IRIG-B time code output (Option) External Event time tags Three user programmable rates The PCI-SyncClock32 from Brandywine Communications provides precision time with zero latency to the host computer over the PCI bus. An on-board microprocessor automatically synchronizes the clock to reference signal inputs. The reference signal inputs can be 1 PPS, IRIG or NASA time codes and optionally, GPS or Have Quick. The clock can free run and be set by commands from the host over the PCI bus. Internal or external processes may be automatically initiated or terminated by using the Match Time feature. This feature asserts an output when the clock's time matches that of the user input start time. The output is terminated under user control or when the pre-programmed stop time is encountered. The resolution of the Match Time comparison is one microsecond. The on-board clock accepts an IRIG A, B, or NASA 36 input and accepts user input reference input signal delay information. An IRIG B code generator is optionally available. Three user programmable pulse rates are provided. Two pulse rates, Clock Low and Clock High, are available on the multi-pin connector. The third rate generator provides heartbeat timing to the host. The divider for each of the three rate generators is programmable by the host over the range 2– 65,535. The inputs to the rate generators are 3 MHz or 100 Hz for the heartbeat, 3 MHz for Clock High and 100 Hz for Clock Low. The advanced microprocessor on the PCI-SyncClock32 module constantly measures the time error between the on-board clock and the reference input code and adjusts the error measurement for propagation delay. In units with a disciplined TCXO or OCXO the residual error is used in an adaptive gain loop to adjust the frequency of the oscillator for minimum error. If the incoming time code is missing, or corrupted by noise, the on-board clock is updated using the disciplined oscillator. When the input code is again useable the correction loop is smoothly closed. 58 bits of BCD time data are available to the host computer using two zero latency time reads. The time message contains units of microseconds through units of years. A status word is available using an additional read. The exact time-of-occurrence of random external events may be captured by using the Event Time input. When the event input is sensed the current time is saved in a buffer for later interrogation by the host. The resolution of the time tag is 100 nanoseconds. The GPS synchronization option adds worldwide time transfer capability that can be traced to the U.S. Government standard UTC-USNO. Very precise synchronization, automatic leap year and leap second correction, and accurate position information are additional benefits provided by the GPS option. Software packages for Windows 95/98, Windows NT, DOS, VxWorks and Linux are available. C language samples are supplied with the PCI-SyncClock32. In addition to the comprehensive set of standard capabilities of the PCI-SyncClock32, Brandywine Communications offers a wide range of options that may be specified. These options allow the user to customize the PCI-SyncClock32 to fit almost any application. 1153 Warner Ave. • Tustin, CA 92780 • 714-755-1050 phone • 714-755-0175 fax www.brandywinecomm.com info@brandywinecomm.com

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PCI SyncClock32: PCI Input/Output timing card with IRIG B, 1PPS and other time codes - 2

PCI-SyncClock32 Specifications General Input Specifications Input Codes Input Amplitude Input Impedance Ratio Frequency Error Code Sync Accuracy 1PPS input 1PPS Sync Accuracy External Event Resolution Min. event spacing IRIG A & B, NASA 36 (1kHz Carrier) .25 to 10 Vpp >10k Ohms 2:1 to 6:1 100 PPM maximum One microsecond TTL, positive edge One microsecond TTL, positive or negative edge 100 ns–unit year None General Output Specifications IRIG B DC Shift Match Pulse Resolution TTL level at Start–Stop time Microseconds–eight milliseconds Clock Low Clock Divisor Clock Input Default output Clock...

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