Note: 1. Operation in excess of any of these conditions may result in permanent damage to this device. The absolute maximum ratings for Vdd, Vg, Idd, Ig, and Pin were determined at an ambient temperature of 25C unless noted otherwise. > 2. Ambient operational temperature T > A = 25ذC unless noted.3. Channel-to-backside Thermal Resistance (T > channel = 34C) as measured using infrared microscopy. Thermal Resistance at backside temp. (T > b ) = 25аC calculated from measured data. > 2. Use IF = DC with caution. Please see ГBiasing and Operation for more details. All tested parameters are guaranteed...

20100-10-2068101214161820FREQUENCY (GHz) 54321068101214161820FREQUENCY (GHz) LSBUSB > CONV GAIN (dB) NOISE FIGURE (dB) 0-10-20-3001020304050FREQUENCY (GHz) 50-5-1068101214161820FREQUENCY (GHz) > IIP3 (dBm) RETURN LOSS (dB) RFLO > 20100-10-6-226101418LO POWER (dBm) 0-5-10-15 -20-505101520LO POWER (dBm) LSBUSB > IIP3 (dBm) CONV GAIN (dB) 2015105 068101214161820FREQUENCY (GHz) 20-2 -4-6-8-1068101214161820FREQUENCY (GHz) > IIP3 (dBm) CONV GAIN (dB) IF = 1 GHzIF = 2 GHz IF = 1 GHzIF = 2 GHz >

181614121068101214161820FREQUENCY (GHz) 20-2-4-6 -8-1068101214161820FREQUENCY (GHz) > CONV GAIN (dB) Vg = -1.2 VVg = -1.1 V Vg = -1.0 V Vg = -0.9 V > INPUT IP3 (dBm) Vg = -1.2 VVg = -1.1 V Vg = -1.0 V Vg = -0.9 V > 2015105068101214161820FREQUENCY (GHz) 54321068101214161820FREQUENCY (GHz) > CONV GAIN (dB) 4 V3 V 5 V > NOISE FIGURE (dB) 4 V3 V 5 V 0-10-20-3001020304050FREQUENCY (GHz) 50-5-1068101214161820FREQUENCY (GHz) > IIP3 (dBm) RETURN LOSS (dB) 25 n C-40 4 V3 V 5 V n C85 n C > 0-10-20-3001020304050FREQUENCY (GHz) 54321068101214161820FREQUENCY (GHz) 25 n C-40 25 n C-40 n C85 n C85 n C n C >...

The AMMP Packaged Devices are compatible with high volume surface mount PCB assembly processes.The PCB material and mounting pattern, as defined in the data sheet, optimizes RF performance and is strong- ly recommended. An electronic drawing of the land pattern is available upon request from Agilent Sales & Application Engineering. > Figure 21. Suggested PCB Land Pattern and Stencil Layout Figure 23. Combined PCB and Stencil LayoutsFigure 22. Stencil Outline Drawing (mm) 7 >