ATA6870N Li-Ion, NiMH Battery Measuring, Charge Balancing and Power-supply Circuit DATASHEET Features ● 12-bit battery-cell voltage measurement ● Simultaneous battery cells measurement in parallel ● Cell temperature measurement ● Charge Balancing Capability ● Parallel balancing of cells possible ● Integrated power supply for MCU ● Undervoltage detection ● Less than 10µA standby current ● Low cell imbalance current (< 10µA) ● Hot plug-in capable ● Interrupt timer for cycling MCU wake-ups ● Cost-efficient solution due to cost-optimized 30V CMOS technology ● Reliable communication between stacked ICs due to level shifters with current sources and checksum monitoring of data ● Daisy-chainable ● Each IC monitors up to 6 battery cells ● 16 ICs (96 cells) per string ● No limit on number of strings Applications ● Battery measurement, supply and monitoring IC for Li-ion and NiMH battery systems in Electric (EV) and Hybrid Electrical (HEV) Vehicles ● Electrical and hybrid electrical vehicles ● Li-Ion batteries as 12V lead-acid battery replacement ● Ebike, scooters ● Uninterruptible power supply (UPS) ● Smart grid Benefits ● Cost reduction due to integrated measurement circuit and high voltage power-supply

Description The Atmel® ATA6870N is a measurement and monitoring circuit designed for Li-ion and NiMH multicell battery stacks in hybrid electrical vehicles. The Atmel ATA6870N monitors the battery-cell voltage and the battery-cell temperature with a 12-bit ADC. The circuit also provides charge-balancing capability for each battery-cell. In addition, a linear regulator is integrated to supply a microcontroller or other external components. Reliable communication between stacked ICs is achieved by level-shifters with current sources. The Atmel ATA6870N can be connected to three, four, five or six...

Output to drive external cell-balancing transistor Battery cell sensing line Output to drive external cell-balancing transistor Battery cell sensing line Output to drive external cell-balancing transistor Battery cell sensing line Output to drive external cell-balancing transistor Battery cell sensing line Output to drive external cell-balancing transistor Battery cell sensing line Interrupt output for MCU/ATA6870N below System clock SPI clock input from MCU/ATA6870N below Master Out Slave In input from MCU Chip select input from MCU/ATA6870N below SPI data input

Master In Slave Out output for MCU Keep pin open (output) Digital negative supply Digital positive supply input (3.3V) Select Master/Slave Analog negative supply Temperature measuring input 1 Temperature measuring input 2 Reference voltage for temperature measuring Internal supply current adjustment Power regulator enable/disable Power down output Power regulator output to supply e.g. an external microcontroller Power regulator supply voltage Master In Slave Out input from ATA6870N above Master Out Slave In output for ATA6870N above SPI clock output for input of ATA6870N above Interrupt input...

ATA6870N System Overview The Atmel® ATA6870N can be stacked up to 16 times in one string. The communication with MCU is carried out on the lowest level through an SPI bus. The data on the SPI bus is transmitted to the 15 other Atmel ATA6870Ns using the communication interface implemented inside Atmel ATA6870N. Figure 4-1. Battery Management Architecture with One Battery String

Figure 4-2. Battery Management Architecture with Several Battery Strings To Battery Master Controller

Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Unless otherwise specified all voltages to pin VSSA. Parameters Ambient temperature Junction temperature Storage temperature Battery cell voltage VVDDHV - VVMBAT7max VMBAT1 Supply voltage...

Absolute Maximum Ratings (Continued) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Unless otherwise specified all voltages to pin VSSA. Parameters Thermal Resistance Package. QFN48 77 Max. thermal resistance junction-ambient(1) Max. thermal resistance...

Digital Level Shifter Cell 6: Reference ADC Cell Balancing Standby Control PD_N_OUT VDDHVP POW_ENA VDDHVM 3.3V Internal Voltage Regulator Cell 1: Reference ADC Cell Balancing Internal Biasing Interchip and Microcontroller Communication Interface Cell Temperature Measuring Digital Level Shifter MISO_IN MOSI_OUT SCK_OUT CS_N_OUT CLK_OUT IRQ_IN CS_N SCK MOSI MISO IRQ CLK DVDD BIASRES Digital Level Shifter Digital Level Shifter Cell 6: Reference ADC Cell Balancing Standby Control PD_N_OUT VDDHVP POW_ENA VDDHVM 3.3V Internal Voltage Regulator Cell 1: Reference ADC Cell Balancing Digital Level Shifter...

Electrical Characteristics Test Conditions Maximum allowed input current in power-down mode (e.g., leakage current of an optocoupler) Input current in ON mode Maximum voltage (pin PD_N left open) VVDDHV VPD_N Propagation delay time from power-down mode to NORM mode Propagation delay time from NORM mode to power-down mode *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Normal Operating Mode (NORM Mode) The Atmel® ATA6870N turns on when the PD_N signal is switched from low to high. The power supplies AVDD and DVDD as well as VDDHVM...

Electrical Characteristics Test Conditions Current consumption IVDDHV (normal mode) Current consumption in power-down mode (PDmode) IVDDHV + IMBAT(i)max(1) Imbalance from battery cell to battery cell in power-down mode (PDN Mode) Supply voltage *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: Largest input current of the cell inputs MBAT(i) Interface to Battery Cells Each input line MBAT(i) and the supply lines VDDHV, AVSS can be protected by additional resistors and a filter capacitor as shown below. Figure 7-3. External Components...