1. Catalogs
  2. Atmel
  3. ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1
video corpo

ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1

ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1
1 / 18 PagesView full catalog

ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1

Product catalog summary
Overview: The Atmel ATA6662C is a LIN transceiver designed for low-speed data communication in vehicles, compliant with LIN specifications 2.0, 2.1, and SAEJ2602-2. It supports a baud rate up to 20Kbaud and operates within a voltage range of 5V to 27V.
Key Features:
  • Compatible with 3.3V and 5V devices.
  • Dominant time-out function to prevent bus line from being driven permanently in dominant state.
  • Normal and Sleep Modes with wake-up capabilities via LIN Bus or WAKE pin.
  • Low standby current during Sleep Mode (10µA).
  • Short-circuit and overtemperature protection.
  • High EMC level and interference protection according to ISO/CD 7637.
Pin Configuration:
  • RXD: Receive data output.
  • EN: Enables Normal Mode; device enters Sleep Mode when low.
  • WAKE: High voltage input for local wake-up.
  • TXD: Transmit data input; active low output after a local wake-up request.
  • GND: Ground, heat sink.
  • LIN: LIN bus line input/output.
  • VS: Battery supply.
  • INH: Controls external voltage regulator; active high after wake-up.
Functional Description:
  • Physical Layer Compatibility: Compatible with LIN physical layer nodes of various revisions.
  • Supply Pin (VS): Includes undervoltage detection to disable transmission below 5V.
  • Bus Pin (LIN): Features internal current limitation, thermal shutdown, and slope control.
  • TXD Dominant Time-out: Prevents permanent dominant state on the bus line.
  • Operation Modes: Includes Normal, Sleep, Fail-safe, and Unpowered Modes.
Wake-up Mechanisms:
  • Remote Wake-up: Triggered by a dominant bus state.
  • Local Wake-up: Triggered via the WAKE pin.
  • Wake-up Source Recognition: Differentiates between local and remote wake-up requests.
Fail-safe Features: Includes reverse current protection, pull-down resistors for disconnected pins, and thermal shutdown with hysteresis.
Absolute Maximum Ratings: Specifies voltage, ESD, and temperature limits to prevent device damage.
Thermal Characteristics: Details thermal resistance and shutdown parameters.
Electrical Characteristics: Provides detailed specifications for voltage, current, and other electrical parameters under various conditions.
1. Electrical Characteristics:
  • TXD Pin: Low-level leakage current is between -3 to +3 µA. In fail-safe mode, the low-level output sink current ranges from 1.3 to 8 mA.
  • EN Input Pin: Low-level voltage input is between -0.3 to +0.8 V, and high-level voltage input is between 2 to 5.5 V. The pull-down resistor ranges from 125 to 600 kΩ.
  • INH Output Pin: High-level voltage in normal mode is VS - 3 to VS V. Leakage current in sleep mode is between -3 to +3 µA.
  • WAKE Pin: High-level input voltage ranges from VS - 1V to VS + 0.3V. Low-level input voltage is typically -1V to VS - 3.3V.
  • LIN Bus Driver: Recessive output voltage is 0.9 × VS to VS V. Dominant voltage varies with load and supply voltage.
2. LIN Bus Receiver:
  • Center of receiver threshold is 0.475 × VS to 0.525 × VS V.
  • Receiver dominant state is -27 to 0.4 × VS V.
  • Receiver input hysteresis is 0.028 × VS to 0.175 × VS V.
3. Internal Timers:
  • Dominant time for wake-up via LIN bus is 30 to 150 µs.
  • Time delay for mode change from fail-safe to normal mode is 2 to 15 µs.
4. AC Parameters:
  • Duty cycles are specified for different bus loads and bit rates, ensuring proper operation at 20Kbit/s and 10.4Kbit/s.
5. Package Information: The ATA6662C is available in an SO8 package, Pb-free, and taped and reeled.
6. Revision History: The document includes a detailed revision history, noting changes in features, electrical characteristics, and other sections over time.
See more

Catalog excerpts

ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-1

Features ● Operating range from 5V to 27V ● Baud rate up to 20Kbaud ● Improved slew rate control according to LIN specification 2.0, 2.1 and SAEJ2602-2 ● Fully compatible with 3.3V and 5V devices ● Dominant time-out function at transmit data (TXD) ● Normal and Sleep Mode ● Wake-up capability via LIN Bus (90µs dominant) ● External wake-up via WAKE pin (35µs low level) ● Control of external voltage regulator via INH pin ● Very low standby current during sleep mode (10µA) ● Wake-up source recognition ● Bus pin short-circuit protected versus GND and battery ● LIN input current < 2µA if VBAT is disconnected ● Overtemperature protection ● High EMC level ● Interference and damage protection according to ISO/CD 7637 ● Fulfills the OEM “Hardware Requirements for LIN in Automotive Applications Rev.1.0”

 Open the catalog to page 1
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-2

Description The Atmel® ATA6662C is a fully integrated LIN transceiver complying with the LIN specification 2.0, 2.1 and SAEJ2602-2. It interfaces the LIN protocol handler and the physical layer. The device is designed to handle the low-speed data communication in vehicles, for example, in convenience electronics. Improved slope control at the LIN driver ensures secure data communication up to 20Kbaud. Sleep Mode guarantees minimal current consumption. The Atmel ATA6662C has advanced EMI and ESD performance. Figure 1-1. Block Diagram 7 Short circuit and overtemperature protection Slew rate control...

 Open the catalog to page 2
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-4

Functional Description Physical Layer Compatibility Since the LIN physical layer is independent from higher LIN layers (e.g., the LIN protocol layer), all nodes with a LIN physical layer according to revision 2.x can be mixed with LIN physical layer nodes, which, according to older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3), are without any restrictions. Supply Pin (VS) Undervoltage detection is implemented to disable transmission if VS falls to a value below 5V in order to avoid false bus messages. After switching on VS, the IC switches to Fail-safe Mode and INHIBIT is switched on....

 Open the catalog to page 4
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-5

Inhibit Output Pin (INH) This pin is used to control an external switchable voltage regulator having a wake-up input. The inhibit pin provides an internal switch towards pin VS. If the device is in Normal Mode, the inhibit high-side switch is turned on and the external voltage regulator is activated. When the device is in Sleep Mode, the inhibit switch is turned off and disables the voltage regulator. A wake-up event on the LIN bus or at pin WAKE will switch the INH pin to the VS level. After a system power-up (VS rises from zero), the pin INH switches automatically to the VS level. Wake-up Input...

 Open the catalog to page 5
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-6

High, except after wake up High ohmic Wake-up events from Sleep Mode: ● LIN bus Figure 3-1 on page 5, Figure 3-2 and Figure 3-3 on page 7 show details of wake-up operations. Remote Wake-up via Dominant Bus State A voltage less than the LIN pre-wake detection VLINL at pin LIN activates the internal LIN receiver and switches on the internal slave termination between the LIN pin and the VS pin. A falling edge at pin LIN, followed by a dominant bus level VBUSdom maintained for a certain time period (tBUS) and a rising edge at pin LIN results in a remote wake-up request. The device switches to Fail-safe...

 Open the catalog to page 6
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-7

Local Wake-up via Pin WAKE A falling edge at pin WAKE, followed by a low level maintained for a certain time period (tWAKE), results in a local wake-up request. The wake-up time (tWAKE) ensures that no transient, according to ISO7637, creates a wake-up. The device switches to Fail-safe Mode. Pin INH is activated (switches to VS) and the internal termination resistor is switched on. The local wakeup request is indicated by a low level at pin RXD to interrupt the microcontroller and a strong pull-down at pin TXD (see Figure 3-3). The voltage threshold for a wake-up signal is 3V below the VS voltage...

 Open the catalog to page 7
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-8

Pin EN provides a pull-down resistor to force the transceiver into Sleep Mode if EN is disconnected. The reverse current is < 2µA at pin LIN during loss of VBAT; this is optimal behavior for bus systems where some slave nodes are supplied from battery or ignition. The implemented hysteresis, Thys, enables the LIN output again after the temperature has been decreased. Pin RXD is set floating if VBAT is disconnected. Pin TXD provides a pull-down resistor to provide a static low if TXD is disconnected. The LIN output driver has a current limitation, and if the junction temperature Tj exceeds the...

 Open the catalog to page 8
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-9

Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters VS - Continuous supply voltage Wake DC and transient voltage (with 33-kΩ serial resistor) - Transient voltage due to ISO7637 (coupling 1nF) LIN - DC voltage - Transient voltage...

 Open the catalog to page 9
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-10

Electrical Characteristics Sleep Mode VLIN > VS – 0.5V VS < 14V Supply current in Normal Mode Bus dominant VS < 14V Total bus load > 500Ω Supply current in Fail-safe Mode VS undervoltage threshold hysteresis Test Conditions DC voltage range nominal Supply current in Sleep Mode RXD Output Pin (Open Drain) Low-level output sink current Normal Mode VLIN = 0V, VRXD = 0.4V High-level leakage current Normal Mode VLIN = VBAT, VRXD = 5V Low-level voltage input High-level voltage input Pull-down resistor Low-level leakage current Low-level output sink current Fail-safe Mode, local wake up VTXD = 0.4V...

 Open the catalog to page 10
ATA6662C LIN Transceiver, Physical Layer According to Specification 2.1-11

Electrical Characteristics (Continued) Test Conditions High-level input voltage Low-level input voltage Wake pull-up current High-level leakage current Driver recessive output voltage RLOAD = 500Ω / 1kΩ Driver dominant voltage VBUSdom_DRV_LoSUP Driver dominant voltage VBUSdom_DRV_HiSUP Driver dominant voltage VBUSdom_DRV_LoSUP Driver dominant voltage VBUSdom_DRV_HiSUP The serial diode is mandatory Voltage drop at the serial diodes In pull-up path with Rslave ISerDiode = 10mA LIN current limitation VBUS = VBAT_max Input leakage current at the receiver, including pull-up resistor as specified Driver...

 Open the catalog to page 11

All Atmel catalogs and technical brochures

  1. 8-bit MCUs

    16  Pages

  2. AT24C01C/02C

    22  Pages

*Prices are pre-tax. They exclude delivery charges and customs duties and do not include additional charges for installation or activation options. Prices are indicative only and may vary by country, with changes to the cost of raw materials and exchange rates.