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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin
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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 1

ATA663254/ATA663231 LIN SBC(1) including LIN Transceiver and Voltage Regulator DATASHEET Features ● Supply voltage up to 40V ● Operating voltage VS = 5V to 28V ● Supply current ● Sleep mode: typically 9µA ● Silent mode: typically 47µA ● Very low current consumption at low supply voltages (2V < VS < 5.5V): typically 130µA ● Linear low-drop voltage regulator, 85mA current capability ● MLC(2) capacitor with 0Ω ESR ● Normal, fail-safe, and silent mode ● ATA663254: VCC = 5.0V ±2% ● ATA663231: VCC = 3.3V ±2% ● Works down to VS = 2.3V ● Sleep mode: VCC is switched off ● VCC undervoltage detection with open drain reset output (NRES, 4ms reset time) ● Voltage regulator is short-circuit and over-temperature protected ● LIN physical layer according to LIN 2.0, 2.1, 2.2, 2.2A and SAEJ2602-2 ● Wake-up capability via LIN bus (100µs dominant) ● Wake-up source recognition ● TXD time-out timer ● Bus pin is over-temperature and short-circuit protected versus GND and battery ● Advanced EMC and ESD performance ● Fulfills the OEM “Hardware Requirements for LIN in Automotive Applications Rev.1.3” ● Interference and damage protection according to ISO7637 ● Package: DFN8 1. LIN SBC: LIN system basis chip 2. Multi layer ceramic

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 2

Description The Atmel® ATA663254/ATA663231 system basis chip is a fully integrated LIN transceiver, designed according to the LIN specification 2.0, 2.1, 2.2, 2.2A and SAEJ2602-2, with a low-drop voltage regulator 5V/3.3V/85mA. The combination of voltage regulator and bus transceiver makes it possible to develop simple but powerful slave nodes in LIN bus systems. Atmel ATA663254/ATA663231 is designed to handle the low-speed data communication in vehicles (for example, in convenience electronics). Improved slope control at the LIN driver ensures secure data communication up to 20Kbaud. The...

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 3

Pin Configuration Figure 2-1. Pinning DFN8 RXD EN NRES TXD Transmit data input Ground, heat slug Supply voltage Function Receive data output Enables normal mode if the input is high VCC undervoltage output, open drain, low at reset Output voltage regulator 5V/3.3V/85mA Heat slug, internally connected to the GND pin

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 4

Supply Pin (VS) LIN operating voltage is VS = 5V to 28V. Undervoltage detection is implemented to disable transmission if VS falls below typ. 4.5V, thereby avoiding false bus messages. After switching on VS, the IC starts in fail-safe mode and the voltage regulator is switched on. The supply current in sleep mode is typically 9µA and 47µA in silent mode. Ground Pin (GND) The IC does not affect the LIN bus in the event of GND disconnection. It is able to handle a ground shift of up to 11.5% of VS. Voltage Regulator Output Pin (VCC) The internal 5V/3.3V voltage regulator is capable of driving...

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 5

Input/Output (TXD) In normal mode the TXD pin is the microcontroller interface for controlling the state of the LIN output. TXD must be pulled to ground in order to drive the LIN bus low. If TXD is high or unconnected (internal pull-up resistor), the LIN output transistor is turned off and the bus is in the recessive state. If the TXD pin stays at GND level while switching into normal mode, it must be pulled to high level longer than 10µs before the LIN driver can be activated. This feature prevents the bus line from being accidentally driven to dominant state after normal mode has been...

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 6

Functional Description Physical Layer Compatibility Because the LIN physical layer is independent of higher LIN layers (e.g., LIN protocol layer), all nodes with a LIN physical layer according to revision 2.x can be mixed with LIN physical layer nodes based on earlier versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3) without any restrictions. Operating Modes Figure 4-1. Operating Modes a: VS > VVS_th_U_F_up (2.4V) b: VS < VVS_th_U_down (1.9V) c: Bus wake-up event (LIN) d: VCC < VVCC_th_uv_down (2.4V/4.2V) e: VS < VVS_th_N_F_down (3.9V) f: VS > VVS_th_F_N_up (4.9V) Unpowered Mode All...

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 7

Normal Mode This is the normal transmitting and receiving mode of the LIN Interface, in accordance with LIN specification 2.x. The VCC voltage regulator operates with 5V/3.3V output voltage, with a low tolerance of ±2% and a maximum output current of 85mA. If an undervoltage condition occurs, NRES is switched to low and the IC changes its state to fail-safe mode. Silent Mode A falling edge at EN while TXD is high switches the IC into silent mode. The TXD signal has to be logic high during the mode select window. The transmission path is disabled in silent mode. The voltage regulator is...

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 8

Sleep Mode A falling edge at EN while TXD is low switches the IC into sleep mode. The TXD signal has to be logic low during the mode select window (Figure 4-5). Figure 4-3. Switching to Sleep Mode Sleep Mode Normal Mode Mode select window TXD td = 3.2µs NRES Delay time sleep mode td_sleep = maximum 20µs LIN LIN switches directly to recessive mode In order to avoid any influence to the LIN pin when switching into sleep mode it is possible to switch the EN up to 3.2µs earlier to low than the TXD. The easiest and best way to do this is by having two falling edges at TXD and EN at the same...

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 9

Fail-Safe Mode The device automatically switches to fail-safe mode at system power-up. The voltage regulator is switched on. The NRES output remains low for tres = 4ms and causes the microcontroller to be reseted. LIN communication is switched off. The IC stays in this mode until EN is switched to high. The IC then changes to normal mode. A low at NRES switches the IC into failsafe mode directly. During fail-safe mode the TXD pin is an output and, together with the RXD output pin, signals the failsafe source. If the device enters fail-safe mode coming from the normal mode (EN=1) due to an...

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ATA663254/ATA663231 4th generation LIN Bus Transceiver with Integrated Voltage Regulator 5.0V/3.3V, 8-Pin - 10

Wake-up Scenarios from Silent Mode or Sleep Mode 4.3.1.1 Remote Wake-up from Silent Mode A remote wake-up from silent mode is only possible if TXD is high. A voltage less than the LIN pre-wake detection VLINL at the LIN pin activates the internal LIN receiver and starts the wake-up detection timer. A falling edge at the LIN pin followed by a dominant bus level maintained for a certain period of time (> tbus) and the following rising edge at pin LIN (see Figure 4-4) result in a remote wake-up request. The device switches from silent mode to fail-safe mode, the VCC voltage regulator remains...

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