ATA5756/ATA5757 UHF ASK/FSK Transmitter IC with Integrated FSK Application, Frequency Range: 313 to 317 MHz (432 to 448 MHz), 6 dBm,
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ATA5756/ATA5757 UHF ASK/FSK Transmitter DATASHEET Features ● PLL transmitter IC with single-ended output ● High output power (6dBm) at 8.1mA (315MHz) and 8.5mA (433MHz) typical values ● Divide by 24 (Atmel® ATA5756) and 32 (Atmel ATA5757) blocks for 13MHz crystal frequencies and for Low XTO start-up times ● Modulation scheme ASK/FSK with internal FSK switch ● Up to 20kBaud manchester coding, up to 40kBaud NRZ coding ● Power-down idle and power-up modes to adjust corresponding current consumption through ASK/FSK/enable input pins ● ENABLE input for parallel usage of controlling pins in a 3-wire bus system ● CLK output switches ON if the crystal current amplitude has reached 35% to 80% of its ● ● ● ● final value Crystal oscillator time until CLK output is activated, typically 0.6ms Supply voltage 2.0V to 3.6V in operation temperature range of –40°C to +125°C ESD protection at all pins (4kV HBM) Small package TSSOP10 Benefits ● Low parasitic FSK switch integrated ● Very short and reproducible time to transmit typically < 0.85ms ● 13.125MHz/13.56MHz crystals give opportunity for small package sizes

The Atmel® ATA5756/ATA5757 is a PLL transmitter IC which has been developed for the demands of RF low-cost transmission systems at data rates up to 20kBaud Manchester coding and 40kBaud NRZ coding. The transmitting frequency range is 313MHz to 317MHz (Atmel ATA5756) and 432MHz to 448MHz (Atmel ATA5757), respectively. It can be used in both FSK and ASK systems. Due to its shorten crystal oscillator settling time it is well suited for Tire Pressure Monitoring (TPM) and for Passive Entry Go applications. Figure 1-1. System Block Diagram Antenna Antenna Remote control receiver

Pin Configuration Figure 2-1. Pinning TSSOP10 CLK Clock output signal for the microcontroller. The clock output frequency is set by the crystal to fXTAL/8. The CLK output stays Low in powerdown mode and after enabling of the PLL. The CLK output switches on if the oscillation amplitude of the crystal has reached a certain level. Switches on the power amplifier for ASK modulation and enables the PLL and XTO if the ENABLE pin is open Switches off the FSK switch (switch has high Z if signal at pin FSK is High) and enables the PLL and the XTO if the ENABLE pin is open

Emitter of antenna output stage ANT1 Open collector antenna output ANT2 Diode switch, used for FSK modulation Supply voltage See ESD protection circuitry (see Figure 4-9 on page 14) See ESD protection circuitry (see Figure 4-9 on page 14) If ENABLE is connected to GND and the ASK or FSK pin is High, the device stays in idle mode. In normal operation ENABLE is left open and ASK or FSK is used to enable the device.

Figure 2-2. Block Diagram ATA5756/ ATA5757 Power up/down CLK 1 General Description This fully integrated PLL transmitter allows the design of simple, low-cost RF miniature transmitters for TPM and RKE applications. The VCO is locked to 24 × fXTAL/32 × fXTAL for Atmel® ATA5756/ATA5757. Thus, a 13.125MHz/13.56MHz crystal is needed for a 315MHz/433.92MHz transmitter. All other PLL and VCO peripheral elements are integrated. The XTO is a series resonance (current mode) oscillator. Only one capacitor and a crystal connected in series to GND are needed as external elements in an ASK system. The...

Functional Description If ASK = Low, FSK = Low and ENABLE = open or Low, the circuit is in power-down mode consuming only a very small amount of current so that a lithium cell used as power supply can work for many years. If the ENABLE pin is left open, ENABLE is the logical OR operation of the ASK and FSK input pins. This means, the IC can be switched on by either the FSK of the ASK input. If the ENABLE pin is Low and ASK or FSK are High, the IC is in idle mode where the PLL, XTO and power amplifier are off and the microcontroller ports controlling the ASK and FSK inputs can be used to...

Transmission with ENABLE = open ASK Mode The Atmel® ATA5756/ATA5757 is activated by ENABLE = open, FSK = High, ASK = Low. The microcontroller is then switched to external clocking. After typically 0.6ms, the CLK driver is activated automatically (i.e., the microcontroller waits until the XTO and CLK are ready). After another time period of ≤ 50µs, the PLL is locked and ready to transmit. The output power can then be modulated by means of pin ASK. After transmission, ASK is switched to Low and the microcontroller returns back to internal clocking. Then, the Atmel ATA5756/ATA5757 is switched...

Transmission with ENABLE = High FSK Mode The Atmel® ATA5756/ATA5757 is activated by ENABLE = High, FSK = High and ASK = Low. The microcontroller is then switched to external clocking. After typically 0.6ms, the CLK driver is activated automatically (i.e., the microcontroller waits until the XTO and CLK are ready). After another time period of ≤ 50µs, the PLL is locked and ready to transmit. The power amplifier is switched on with ASK = H. The Atmel ATA5756/ATA5757 is then ready for FSK modulation. The microcontroller starts to switch on and off the capacitor between the crystal load...

Accuracy of Frequency Deviation The accuracy of the frequency deviation using the XTAL pulling method is about ±20% if the following tolerances are considered. One important aspect is that the values of C0 and CM of typical crystals are strongly correlated which reduces the tolerance of the frequency deviation. Figure 4-5. Tolerances of Frequency Modulation VS CStray XTAL CM C0 Crystal equivalent circuit Using a crystal with a motional capacitance of CM = 4.37fF ±15%, a nominal load capacitance of CLNOM = 18pF and a parallel capacitance of C0 = 1.30pF correlated with CM results in C0 = 297...

Output Matching and Power Setting The output power is set by the load impedance of the antenna. The maximum output power is achieved with a load impedance of ZLoad, opt = 380Ω + j340Ω (Atmel ATA5756) at 315MHz and ZLoad, opt = 280Ω + j310Ω (Atmel ATA5757) at 433.92MHz. A low resistive path to VS is required to deliver the DC current (see Figure 4-6 on page 10). The power amplifier delivers a current pulse and the maximum output power is delivered to a resistive load if the 0.66pF output capacitance of the power amplifier is compensated by the load impedance. At the ANT1 pin, the RF output...